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A 1GHz Fractional-N PLL Clock Generator with Low-OSR ΔΣ Modulation and FIR-Embedded Noise Filtering.
Xueyi Yu
Yuanfeng Sun
Li Zhang
Woogeun Rhee
Zhihua Wang
Published in:
ISSCC (2008)
Keyphrases
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noise filtering
low signal to noise ratio
noise reduction
denoising
filtering method
noise detection
power consumption
low pass filter
image segmentation
filter bank
watermarking algorithm
data cleaning
data preprocessing
random noise
post processing