Yi-Jong Yeh

Publication Activity (10 Years)

Years Active: 2001-2005
Publications (10 Years): 0

Publications

Kai-Hui Chang, Jeh-Yen Kang, Han-Wei Wang, Wei-Ting Tu, Yi-Jong Yeh, Sy-Yen Kuo
Automatic Partitioner for Behavior Level Distributed Logic Simulation. FORTE (2005)
Kai-Hui Chang, Wei-Ting Tu, Yi-Jong Yeh, Sy-Yen Kuo
A Temporal Assertion Extension to Verilog. ATVA (2004)
Yi-Jong Yeh, Sy-Yen Kuo
An Optimization-Based Multiple-Voltage Scaling Technique for Low-Power CMOS Digital Design. J. Circuits Syst. Comput. 11 (4) (2002)
Yi-Jong Yeh, Sy-Yen Kuo
An optimization-based low-power voltage scaling technique using multiple supply voltages. ISCAS (5) (2001)
Yi-Jong Yeh, Sy-Yen Kuo, Jing-Yang Jou
Converter-free multiple-voltage scaling techniques for low-powerCMOS digital design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20 (1) (2001)