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Yi-Hang Chen
Publication Activity (10 Years)
Years Active: 2011-2017
Publications (10 Years): 3
Top Topics
Integrated Circuit
Constrained Minimization
Electrical Properties
High Speed
Top Venues
VLSI-DAT
VLSI-SoC
DATE
ACM J. Emerg. Technol. Comput. Syst.
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Publications
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Juinn-Dar Huang
,
Yi-Hang Chen
,
Jia-Shin Lu
Defect-aware synthesis for reconfigurable single-electron transistor arrays.
VLSI-SoC
(2017)
Yi-Hang Chen
,
Jian-Yu Chen
,
Juinn-Dar Huang
Area Minimization Synthesis for Reconfigurable Single-Electron Transistor Arrays with Fabrication Constraints.
ACM J. Emerg. Technol. Comput. Syst.
12 (4) (2016)
Yi-Hang Chen
,
Yang Chen
,
Juinn-Dar Huang
ROBDD-based area minimization synthesis for reconfigurable single-electron transistor arrays.
VLSI-DAT
(2015)
Yi-Hang Chen
,
Jian-Yu Chen
,
Juinn-Dar Huang
Area minimization synthesis for reconfigurable single-electron transistor arrays with fabrication constraints.
DATE
(2014)
Yi-Hang Chen
,
Yi-Ting Chen
,
Juinn-Dar Huang
Two-staged parallel layer-aware partitioning for 3D designs.
VLSI-DAT
(2014)
Juinn-Dar Huang
,
Yi-Hang Chen
,
Ya-Chien Ho
Throughput optimization for latency-insensitive system with minimal queue insertion.
ASP-DAC
(2011)