Ye Zhang

Publication Activity (10 Years)

Years Active: 2011-2018
Publications (10 Years): 3

Top Topics

Functional Verification

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Markus Scholl, Tobias Saalfeld, Jan Henning Mueller, Ye Zhang, Vahid Bonehi, Christoph Beyerstedt, Fabian Speicher, Moritz Schrey, Ralf Wunderlich, Stefan Heinen
A multistandard, triple band wireless transceiver in a 130 nm CMOS technology with integrated PAs for IoT applications. RWS (2018)
Markus Scholl, Ye Zhang, Ralf Wunderlich, Stefan Heinen
A 80 nW, 32 kHz charge-pump based ultra low power oscillator with temperature compensation. ESSCIRC (2016)
Markus Scholl, Ye Zhang, Ralf Wunderlich, Stefan Heinen
A high efficiency straightforward design and verification methodology for PLL systems. MWSCAS (2016)
Zhimiao Chen, Yifan Wang, Lei Liao, Ye Zhang, Aytac Atac, Jan Henning Müller, Ralf Wunderlich, Stefan Heinen
A SystemC Virtual Prototyping based Methodology for Multi-Standard SoC Functional Verification. DAC (2014)
Jan Henning Mueller, Ye Zhang, Lei Liao, Aytac Atac, Zhimiao Chen, Bastian Mohr, Stefan Heinen
A low complexity multi standard dual band CMOS polar transmitter for smart utility networks. SoCC (2014)
Lei Liao, Aytac Atac, Ye Zhang, Yifan Wang, Zhimiao Chen, Martin Schleyer, Ralf Wunderlich, Stefan Heinen
A 1.2V, 2.7mA receiver front-end for bluetooth low energy applications. RWS (2014)
Ye Zhang, Jan Henning Mueller, Bastian Mohr, Stefan Heinen
A Low-Power Low-Complexity Multi-Standard Digital Receiver for Joint Clock Recovery and Carrier Frequency Offset Calibration. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2014)
Ye Zhang, Ralf Wunderlich, Stefan Heinen
A low-complexity low-spurs digital architecture for wideband PLL applications. Microelectron. J. 45 (7) (2014)
Bastian Mohr, Ye Zhang, Jan Henning Mueller, Stefan Heinen
Compensating imperfections in RF-DAC based transmitters using LUT-based predistortion. SoCC (2014)
Aytac Atac, Zhimiao Chen, Lei Liao, Yifan Wang, Martin Schleyer, Ye Zhang, Ralf Wunderlich, Stefan Heinen
An HDL-Based System Design Methodology for Multistandard RF SoC's. DAC (2014)
Ye Zhang, Jan Henning Mueller, Muh-Dey Wei, Ralf Wunderlich, Stefan Heinen
Design of a low power multistandard transceiver chain based on current-reuse VCO. SoCC (2014)
Ye Zhang, Zhimiao Chen, Ralf Wunderlich, Stefan Heinen
Low-effort high-performance viterbi-based receiver for Bluetooth LE applications. ISCAS (2013)
Jan Henning Mueller, Bastian Mohr, Ye Zhang, Renato Negra, Stefan Heinen
A digital centric transmitter architecture with arbitrary ratio baseband-to-LO upsampling. ISCAS (2013)
Ye Zhang, Ralf Wunderlich, Stefan Heinen
Low complexity image rejection demodulator for bluetooth LE applications. ISCAS (2013)
Ye Zhang, Yifan Wang, Ralf Wunderlich, Stefan Heinen
A Novel Low-Effort Demodulator for Low Power Short Range Wireless Transceivers. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2013)
Aytac Atac, Lei Liao, Yifan Wang, Martin Schleyer, Ye Zhang, Ralf Wunderlich, Stefan Heinen
A 1.7mW quadrature bandpass ΔΣ ADC with 1MHz BW and 60dB DR at 1MHz IF. ISCAS (2013)
Ye Zhang, Ralf Wunderlich, Stefan Heinen
An ultra low power frequency synthesizer based on multiphase fractional frequency divider. ISCAS (2012)
Ye Zhang, Niklas Zimmermann, Ralf Wunderlich, Stefan Heinen
A wide-frequency-range fractional-N synthesizer for clock generation in 65nm CMOS. ICECS (2011)