Yasuhiko Sasaki

Publication Activity (10 Years)

Years Active: 1996-2006
Publications (10 Years): 0

Publications

Yasuhiko Sasaki, Naoki Kato, Hiroaki Nakaya
Constant-ratio-coupled multi-grain digital synchronizer with flexible input-output delay selection for versatility in low-power applications. IEEE J. Solid State Circuits 41 (5) (2006)
Yasuhiko Sasaki, Mitsumasa Sato, Masaru Kuramoto, Fujio Kikuchi, Tsutomu Kawashima, Hiroo Masuda, Kazuo Yano
Crosstalk delay analysis of a 0.13-μm node test chip and precise gate-level simulation technology. IEEE J. Solid State Circuits 38 (5) (2003)
Yasuhiko Sasaki, Kazuo Yano
Multi-aggressor relative window method for timing analysis including crosstalk delay degradation. CICC (2000)
Yasuhiko Sasaki, Kunihito Rikino, Kazuo Yano
ALPS: An Automatic Layouter for Pass-Transistor Cell Synthesis. ASP-DAC (1998)
Shunzo Yamashita, Naoki Katoh, Yasuhiko Sasaki, Yohei Akita, Hidetoshi Chikata, Kazuo Yano
Hole filling: a novel delay reduction technique using selector logic. CICC (1998)
Kazuo Yano, Yasuhiko Sasaki, Kunihito Rikino, Koichi Seki
Top-down pass-transistor logic design. IEEE J. Solid State Circuits 31 (6) (1996)