​
Login / Signup
Xin Cheng
ORCID
Publication Activity (10 Years)
Years Active: 2022-2024
Publications (10 Years): 15
Top Topics
Bitstream
Bit Rate
Energy Efficiency
Random Number
Top Venues
IEEE Trans. Circuits Syst. II Express Briefs
Int. J. Circuit Theory Appl.
IEEE Trans. Cogn. Dev. Syst.
IEEE Trans. Circuits Syst. Video Technol.
</>
Publications
</>
Juntao Han
,
Xin Cheng
,
Guangjun Xie
,
Junwei Sun
,
Gang Liu
,
Zhang Zhang
Memristor-Based Neural Network Circuit of Associative Memory With Occasion Setting.
IEEE Trans. Cogn. Dev. Syst.
16 (3) (2024)
Zhang Zhang
,
Annan Wang
,
Hongtao Ren
,
Guangjun Xie
,
Xin Cheng
Voltage-Resistance-Adaptive MPPT Circuit for Energy Harvesting.
IEEE Des. Test
41 (3) (2024)
Xin Cheng
,
Yixuan Xu
,
Kefan Wang
,
Yongqiang Zhang
,
Bin Li
,
Zhang Zhang
Lightweight and flexible hardware implementation of authenticated encryption algorithm SIMON-Galois/Counter Mode.
Int. J. Circuit Theory Appl.
51 (12) (2023)
Yongqiang Zhang
,
Siting Liu
,
Jie Han
,
Zhendong Lin
,
Shaowei Wang
,
Xin Cheng
,
Guangjun Xie
An Energy-Efficient Binary-Interfaced Stochastic Multiplier Using Parallel Datapaths.
IEEE Trans. Very Large Scale Integr. Syst.
31 (9) (2023)
Yongqiang Zhang
,
Lingyun Xie
,
Jie Han
,
Xin Cheng
,
Guangjun Xie
Highly Accurate and Energy Efficient Binary-Stochastic Multipliers for Fault-Tolerant Applications.
IEEE Trans. Circuits Syst. II Express Briefs
70 (2) (2023)
Xin Cheng
,
Yunfeng Zhang
,
Haowen Zhu
,
Yang Zhou
A true random number generator with high bit rate and low energy efficiency.
Int. J. Circuit Theory Appl.
51 (7) (2023)
Zhang Zhang
,
Ao Xu
,
Chao Li
,
Gang Liu
,
Xin Cheng
Mathematical analysis and circuit emulator design of the three-valued memristor.
Integr.
86 (2022)
Yizhong Yang
,
Jiahao Ruan
,
Yongqiang Zhang
,
Xin Cheng
,
Zhang Zhang
,
Guangjun Xie
STPNet: A Spatial-Temporal Propagation Network for Background Subtraction.
IEEE Trans. Circuits Syst. Video Technol.
32 (4) (2022)
Yongqiang Zhang
,
Chunsong Zhu
,
Xin Cheng
,
Guangjun Xie
Design and Implementation of SRAM for LUT and CLB Using Clocking Mechanism in Quantum-Dot Cellular Automata.
IEEE Trans. Circuits Syst. II Express Briefs
69 (9) (2022)
Zhang Zhang
,
Ao Xu
,
Hong Tao Ren
,
Gang Liu
,
Xin Cheng
Reconfigurable multivalued memristor FPGA model for digital recognition.
Int. J. Circuit Theory Appl.
50 (11) (2022)
Zhang Zhang
,
Ao Xu
,
Chao Li
,
Yadong Wei
,
Zhiheng Ge
,
Xin Cheng
,
Gang Liu
Gate-Controlled Memristor FPGA Model for Quantified Neural Network.
IEEE Trans. Circuits Syst. II Express Briefs
69 (11) (2022)
Yizhong Yang
,
Zhihang Cheng
,
Haotian Yu
,
Yongqiang Zhang
,
Xin Cheng
,
Zhang Zhang
,
Guangjun Xie
MSE-Net: generative image inpainting with multi-scale encoder.
Vis. Comput.
38 (8) (2022)
Shaowei Wang
,
Guangjun Xie
,
Wenbing Xu
,
Xin Cheng
,
Yongqiang Zhang
High-accuracy mean circuits design by manipulating correlation for stochastic computing.
Int. J. Circuit Theory Appl.
50 (10) (2022)
Shaowei Wang
,
Guangjun Xie
,
Xin Cheng
,
Yongqiang Zhang
Weighted-Adder-Based Polynomial Computation Using Correlated Unipolar Stochastic Bitstreams.
IEEE Trans. Circuits Syst. II Express Briefs
69 (11) (2022)
Feifei Deng
,
Guangjun Xie
,
Xin Cheng
,
Yongqiang Zhang
A general and efficient clocking scheme for majority logic in quantum-dot cellular automata.
Microelectron. J.
128 (2022)