William Y. Chen

Publication Activity (10 Years)

Years Active: 1991-2000
Publications (10 Years): 0

Publications

Jay Bharadwaj, William Y. Chen, Weihaw Chuang, Gerolf Hoflehner, Kishore N. Menezes, Kalyan Muthukumar, Jim Pierce
The Intel IA-64 Compiler Code Generator. IEEE Micro 20 (5) (2000)
Pohua P. Chang, Scott A. Mahlke, William Y. Chen, Nancy J. Warter, Wen-mei W. Hwu
IMPACT: An Architectural Framework for Multiple-Instruction-Issue Processors. 25 Years ISCA: Retrospectives and Reprints (1998)
Pohua P. Chang, Daniel M. Lavery, Scott A. Mahlke, William Y. Chen, Wen-mei W. Hwu
The Importance of Prepass Code Scheduling for Superscalar and Superpipelined Processors. IEEE Trans. Computers 44 (3) (1995)
Pohua P. Chang, Nancy J. Warter, Scott A. Mahlke, William Y. Chen, Wen-mei W. Hwu
Three Architecutral Models for Compiler-Controlled Speculative Execution. IEEE Trans. Computers 44 (4) (1995)
David M. Gallagher, William Y. Chen, Scott A. Mahlke, John C. Gyllenhaal, Wen-mei W. Hwu
Dynamic Memory Disambiguation Using the Memory Conflict Buffer. ASPLOS (1994)
William Y. Chen, Scott A. Mahlke, Nancy J. Warter, Sadun Anik, Wen-mei W. Hwu
Profile-assisted instruction scheduling. Int. J. Parallel Program. 22 (2) (1994)
William Y. Chen, Pohua P. Chang, Thomas M. Conte, Wen-mei W. Hwu
The Effect of Code Expanding Optimizations on Instruction Cache Design. IEEE Trans. Computers 42 (9) (1993)
Scott A. Mahlke, William Y. Chen, Roger A. Bringmann, Richard E. Hank, Wen-mei W. Hwu, B. Ramakrishna Rau, Michael S. Schlansker
Sentinel Scheduling for VLIW and Superscalar Processors. ACM Trans. Comput. Syst. 11 (4) (1993)
Tokuzo Kiyohara, Scott A. Mahlke, William Y. Chen, Roger A. Bringmann, Richard E. Hank, Sadun Anik, Wen-mei W. Hwu
Register Connection: A New Approach to Adding Registers into Instruction Set Architectures. ISCA (1993)
Wen-mei W. Hwu, Scott A. Mahlke, William Y. Chen, Pohua P. Chang, Nancy J. Warter, Roger A. Bringmann, Roland G. Ouellette, Richard E. Hank, Tokuzo Kiyohara, Grant E. Haab, John G. Holm, Daniel M. Lavery
The superblock: An effective technique for VLIW and superscalar compilation. J. Supercomput. 7 (1-2) (1993)
William Y. Chen, Scott A. Mahlke, Wen-mei W. Hwu, Tokuzo Kiyohara, Pohua P. Chang
Tolerating data access latency with register preloading. ICS (1992)
Scott A. Mahlke, William Y. Chen, John C. Gyllenhaal, Wen-mei W. Hwu
Compiler Code Transformations for Superscalar-Based High Performance Systems. SC (1992)
Scott A. Mahlke, David C. Lin, William Y. Chen, Richard E. Hank, Roger A. Bringmann
Effective compiler support for predicated execution using the hyperblock. MICRO (1992)
Pohua P. Chang, Scott A. Mahlke, William Y. Chen, Wen-mei W. Hwu
Profile-guided Automatic Inline Expansion for C Programs. Softw. Pract. Exp. 22 (5) (1992)
William Y. Chen, Roger A. Bringmann, Scott A. Mahlke, Richard E. Hank, James E. Sicolo
An efficient architecture for loop based data preloading. MICRO (1992)
William Y. Chen, Roger A. Bringmann, Scott A. Mahlke, Sadun Anik, Tokuzo Kiyohara, Nancy J. Warter, Daniel M. Lavery, Wen-mei W. Hwu, Richard E. Hank, John C. Gyllenhaal
Using Profile Information to Assist Advaced Compiler Optimization and Scheduling. LCPC (1992)
Scott A. Mahlke, William Y. Chen, Wen-mei W. Hwu, B. Ramakrishna Rau, Michael S. Schlansker
Sentinel Scheduling for VLIW and Superscalar Processors. ASPLOS (1992)
William Y. Chen, Scott A. Mahlke, Wen-mei W. Hwu
Tolerating First Level Memory Access Latency in High-Performance Systems. ICPP (1) (1992)
William Y. Chen, Scott A. Mahlke, Pohua P. Chang, Wen-mei W. Hwu
Data Access Microarchitectures for Superscalar Processors with Compiler-Assisted Data Prefetching. MICRO (1991)
Pohua P. Chang, William Y. Chen, Scott A. Mahlke, Wen-mei W. Hwu
Comparing Static and Dynamic Code Scheduling for Multiple-Instruction-Issue Processors. MICRO (1991)
Scott A. Mahlke, Nancy J. Warter, William Y. Chen, Pohua P. Chang, Wen-mei W. Hwu
The Effect of Compiler Optimizations on Available Parallelism in Scalar Programs. ICPP (2) (1991)
Pohua P. Chang, Scott A. Mahlke, William Y. Chen, Nancy J. Warter, Wen-mei W. Hwu
IMPACT: An Architectural Framework for Multiple-Instruction-Issue Processors. ISCA (1991)