Walter Guggenbühl

Publication Activity (10 Years)

Years Active: 1987-1995
Publications (10 Years): 0

Publications

Urs A. Müller, Anton Gunzinger, Walter Guggenbühl
Fast neural net simulation with a DSP processor array. IEEE Trans. Neural Networks 6 (1) (1995)
Markus Zeltner, Bruno Schneuwly, Walter Guggenbühl
How to program and configure a heterogeneous multiprocessor. Mach. Vis. Appl. 7 (1) (1993)
Marcel Jacomet, Walter Guggenbühl
Layout-dependent fault analysis and test synthesis for CMOS circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12 (6) (1993)
Urs A. Müller, Anton Gunzinger, Walter Guggenbühl
Neural net simulation with MUSIC. ICNN (1993)
Jerzy B. Lont, Walter Guggenbühl
Analog CMOS implementation of a multilayer perceptron with nonlinear synapses. IEEE Trans. Neural Networks 3 (3) (1992)
Anton Gunzinger, Urs A. Müller, Walter Scott, Bernhard Bäumle, Peter Kohler, Walter Guggenbühl
Architecture and realization of a multi signal processor system. ASAP (1992)
Anton Gunzinger, Urs A. Müller, Walter Scott, Bernhard Bäumle, Peter Kohler, Johann vonder Mühll, Florian Müller-Plathe, Wilfred F. van Gunsteren, Walter Guggenbühl
Achieving Super Computer Performance with a DSP Array Processor. SC (1992)
Urs A. Müller, Bernhard Bäumle, Peter Kohler, Anton Gunzinger, Walter Guggenbühl
Achieving supercomputer performane for neural net simulation with an array of digital signal processors. IEEE Micro 12 (5) (1992)
Peter Schaeren, Bruno Schneuwly, Walter Guggenbühl
3D Scene Acquisition by Motion Induced Stereo. DAGM-Symposium (1991)
Walter Guggenbühl, Guy Morbach, Michael Schaller
Simulation lossless symmetrical three conductor systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 10 (7) (1991)
D. Stokar, Anton Gunzinger, Walter Guggenbühl, Edi Hiltebrand, Severin Mathis, Peter Schaeren, Bruno Schneuwly, Markus Zeltner
SYDAMA II: A Heterogeneous Multiprocessor System for Real Time Image Processing. CONPAR (1990)
Anton Gunzinger, Severin Mathis, Walter Guggenbühl
The synchronous dataflow machine: a computer architecture for real time image processing. ICPR (2) (1990)
Anton Gunzinger, Severin Mathis, Walter Guggenbühl
The SYnchronous DAtaflow MAchine: Architecture and Performance. PARLE (1) (1989)
Anton Gunzinger, Severin Mathis, Walter Guggenbühl
Datenflussrechner zur Echtzeitbildverarbeitung: Anwendungen. DAGM-Symposium (1988)
Anton Gunzinger, Severin Mathis, Walter Guggenbühl
A reconfigurable systolic array for real-time image processing. ICASSP (1988)
Anton Gunzinger, Severin Mathis, Walter Guggenbühl
Datenflußrechner zur Echtzeitbildverarbeitung: Softwareentwicklungsumgebung. DAGM-Symposium (1987)