Vijay Dhanasekaran

Publication Activity (10 Years)

Years Active: 2007-2011
Publications (10 Years): 0

Publications

Vijay Dhanasekaran, Manisha Gambhir, Mohamed M. Elsayed, Edgar Sánchez-Sinencio, José Silva-Martínez, Chinmaya Mishra, Lei Chen, Erik Pankratz
A Continuous Time Multi-Bit Delta Sigma ADC Using Time Domain Quantizer and Feedback Element. IEEE J. Solid State Circuits 46 (3) (2011)
Mohamed M. Elsayed, Vijay Dhanasekaran, Manisha Gambhir, José Silva-Martínez, Edgar Sánchez-Sinencio
A 0.8 ps DNL Time-to-Digital Converter With 250 MHz Event Rate in 65 nm CMOS for Time-Mode-Based Sigma Delta Modulator. IEEE J. Solid State Circuits 46 (9) (2011)
Vijay Dhanasekaran, Manisha Gambhir, Mohamed M. Elsayed, Edgar Sánchez-Sinencio, José Silva-Martínez, Chinmaya Mishra, Lei Chen, Erik Pankratz
A 20MHz BW 68dB DR CT ΔΣ ADC based on a multi-bit time-domain quantizer and feedback element. ISSCC (2009)
Vijay Dhanasekaran, José Silva-Martínez, Edgar Sánchez-Sinencio
Design of Three-Stage Class-AB 16ΩHeadphone Driver Capable of Handling Wide Range of Load Capacitance. IEEE J. Solid State Circuits 44 (6) (2009)
Manisha Gambhir, Vijay Dhanasekaran, José Silva-Martínez, Edgar Sánchez-Sinencio
A low power 1.3GHz dual-path current mode Gm-C filter. CICC (2008)
Vijay Dhanasekaran, José Silva-Martínez, Edgar Sánchez-Sinencio
A 1.2mW 1.6Vpp-Swing Class-AB 16Ω Headphone Driver Capable of Handling Load Capacitance up to 22nF. ISSCC (2008)
Manisha Gambhir, Vijay Dhanasekaran, José Silva-Martínez, Edgar Sánchez-Sinencio
-C Filters. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2007)
Vijay Dhanasekaran, Manisha Gambhir, José Silva-Martínez, Edgar Sánchez-Sinencio
A 1.1 GHz Fifth Order Active-LC Butterworth Type Equalizing Filter. IEEE J. Solid State Circuits 42 (11) (2007)