A 0.8 ps DNL Time-to-Digital Converter With 250 MHz Event Rate in 65 nm CMOS for Time-Mode-Based Sigma Delta Modulator.
Mohamed M. ElsayedVijay DhanasekaranManisha GambhirJosé Silva-MartínezEdgar Sánchez-SinencioPublished in: IEEE J. Solid State Circuits (2011)
Keyphrases
- sigma delta
- cmos technology
- image sensor
- low voltage
- low power
- analog to digital converter
- dynamic range
- video camera
- nm technology
- digital camera
- delta sigma
- image processing algorithms
- power consumption
- imaging systems
- mixed signal
- hardware and software
- high order
- high speed
- metal oxide semiconductor
- silicon on insulator
- motion blur
- matlab simulink
- transfer function
- control method
- video sequences
- low cost
- power dissipation
- cmos image sensor
- digital images