Tooraj Nikoubin

Publication Activity (10 Years)

Years Active: 2009-2024
Publications (10 Years): 11

Top Topics

Encryption Decryption

Energy Efficient

Advanced Encryption Standard

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Omid Bazgir, Satwik Gali, Tooraj Nikoubin
Area-power and Energy Efficient Substitution box (S-box) in Advanced Encryption Standard (AES). ACM Great Lakes Symposium on VLSI (2024)
Ashish Joshi, Srirathan Rangisetti, Priyanka Lohray, Tooraj Nikoubin
Fast & Energy Efficient Binary to BCD Converter with Complement Based Logic Design (CBLD) for BCD Multipliers. CCWC (2019)
Tooraj Nikoubin, Hareesh-Reddy Basireddy
Fast, Area & Energy Efficient Supergate Design With Multi-Output & Multi-Functional CDM Cells. IEEE Access 7 (2019)
Priyanka Lohray, Satwik Gali, Srirathan Rangisetti, Tooraj Nikoubin
Rounding Technique Analysis for Power-Area & Energy Efficient Approximate Multiplier Design. CCWC (2019)
Hareesh-Reddy Basireddy, Karthikeya Challa, Tooraj Nikoubin
Hybrid Logical Effort for Hybrid Logic Style Full Adders in Multistage Structures. IEEE Trans. Very Large Scale Integr. Syst. 27 (5) (2019)
Mahdieh Grailoo, Ashish Joshi, Mounika Mulkalapally, Tooraj Nikoubin
Power and Energy Efficient Standard Cells with CDM Logic Style for Optimization of Multiplier Structures. ICCCNT (2016)
Mounika Mulkalapally, Jacob Manning, Paul Gatewood, Tooraj Nikoubin
High Speed, Area and Power Efficient 32-bit Vedic Multipliers. ICCCNT (2016)
Ashish Joshi, Thejaswani Putta, Tooraj Nikoubin
Power and Energy Efficient Standard Cell Library Design in CDM Logic Style with FinFET Transistors. ICCCNT (2016)
Nikhil Patil, Teja Geddamuri, Tooraj Nikoubin
Complement Based Logic Design (CBLD) for Area and Power Efficiency of Arithmetic Building Blocks. ICCCNT (2016)
Ashish Patankar, Tooraj Nikoubin
Wearable System for Obstacle Detection and Human Assistance Using Ultrasonic Sensor Array. ICCCNT (2016)
Tooraj Nikoubin, Mahdieh Grailoo, Changzhi Li
Energy and Area Efficient Three-Input XOR/XNORs With Systematic Cell Design Methodology. IEEE Trans. Very Large Scale Integr. Syst. 24 (1) (2016)
Tooraj Nikoubin, José Maria Muñoz-Ferreras, Roberto Gómez-García, Daan Liang, Changzhi Li
Structural health monitoring of wind turbines using a low-cost portable k-band radar: An ab-initio field investigation. WiSNet (2015)
Yiran Li, Changzhan Gu, Tooraj Nikoubin, Changzhi Li
Wireless radar devices for smart human-computer interaction. MWSCAS (2014)
Reza Faghih Mirzaee, Tooraj Nikoubin, Keivan Navi, Omid Hashemipour
Differential Cascode Voltage Switch (DCVS) Strategies by CNTFET Technology for Standard Ternary Logic. Microelectron. J. 44 (12) (2013)
Tooraj Nikoubin, Mahdieh Grailoo, Sayyed Hasan Mozafari
Cell Design Methodology Based on Transmission Gate for Low-Power High-Speed Balanced XOR-XNOR Circuits in Hybrid-CMOS Logic Style. J. Low Power Electron. 6 (4) (2010)
Tooraj Nikoubin, Poona Bahrebar, Sara Pouri, Keivan Navi, Vaez Iravani
Simple Exact Algorithm for Transistor Sizing of Low-Power High-Speed Arithmetic Circuits. VLSI Design 2010 (2010)
Tooraj Nikoubin, Fatemeh Eslami, Amirali Baniasadi, Keivan Navi
A New Cell Design Methodology for Balanced XOR-XNOR Circuits for Hybrid-CMOS Logic. J. Low Power Electron. 5 (4) (2009)