Tien-Yu Lo

Publication Activity (10 Years)

Years Active: 2006-2019
Publications (10 Years): 3

Top Topics

Quantization Error

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

IEEE J. Solid State Circuits

Publications

Tien-Yu Lo, Chan-Hsiang Weng, Hung-Yi Hsieh, Yun-Shiang Shu, Pao-Cheng Chiu
An 8 × - OSR 25MHz-BW 79.4dB/74dB DR/SNDR CT Δ σ Modulator Using 7b Linearized Segmented DACs with Digital Noise-Coupling-Compensation Filter in 7nm FinFET CMOS. ISSCC (2019)
Yun-Shiang Shu, Liang-Ting Kuo, Tien-Yu Lo
An Oversampling SAR ADC With DAC Mismatch Error Shaping Achieving 105 dB SFDR and 101 dB SNDR Over 1 kHz BW in 55 nm CMOS. IEEE J. Solid State Circuits 51 (12) (2016)
Yun-Shiang Shu, Liang-Ting Kuo, Tien-Yu Lo
27.2 an oversampling SAR ADC with DAC mismatch error shaping achieving 105dB SFDR and 101dB SNDR over 1kHz BW in 55nm CMOS. ISSCC (2016)
Tien-Yu Lo, Chi-Hsiang Lo
1-V 365-µW 2.5-MHz Channel Selection Filter for 3G Wireless Receiver in 55-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 22 (5) (2014)
Yun-Shiang Shu, Jui-Yuan Tsai, Ping Chen, Tien-Yu Lo, Pao-Cheng Chiu
A background calibration technique for fully dynamic flash ADCs. VLSI-DAT (2013)
Yun-Shiang Shu, Jui-Yuan Tsai, Ping Chen, Tien-Yu Lo, Pao-Cheng Chiu
A 28fJ/conv-step CT ΔΣ modulator with 78dB DR and 18MHz BW in 28nm CMOS using a highly digital multibit quantizer. ISSCC (2013)
Tien-Yu Lo
A 102dB dynamic range audio sigma-delta modulator in 40nm CMOS. A-SSCC (2011)
Tien-Yu Lo, Chung-Chih Hung
A 1 GHz Equiripple Low-Pass Filter With a High-Speed Automatic Tuning Scheme. IEEE Trans. Very Large Scale Integr. Syst. 19 (2) (2011)
Tien-Yu Lo, Chung-Chih Hung, Chi-Hsiang Lo
A -68.5 dB IM3 Low-Voltage CMOS Transconductor with Wide Tuning Range. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (8) (2010)
Tien-Yu Lo, Chih-Lung Kuo, Chung-Chih Hung, Chi-Hsiang Lo
A 250MHz Gm-C filter using negative current feedback OTAs. ICECS (2009)
Tien-Yu Lo, Chung-Chih Hung, Mohammed Ismail
-C Filter for Multi-Mode CMOS Direct-Conversion Wireless Receivers. IEEE J. Solid State Circuits 44 (9) (2009)
Tien-Yu Lo, Chung-Chih Hung
- C Channel Selection Filter for Mobile Applications in 1-V Supply Voltage. IEEE Trans. Circuits Syst. II Express Briefs (4) (2008)
Tien-Yu Lo, Chung-Chih Hung
A 40-MHz Double Differential-Pair CMOS OTA With -hbox60-dB IM3. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2008)
Tien-Yu Lo, Chung-Chih Hung
Low-Voltage Multi-Mode Gm-C Channel Selection Filter for Mobile Applications. CICC (2007)
Chia-Wei Chang, Tien-Yu Lo, Chia-Min Chen, Kuo-Hsi Wu, Chung-Chih Hung
A Low-Power CMOS Voltage Reference Circuit Based On Subthreshold Operation. ISCAS (2007)
Tien-Yu Lo, Chung-Chih Hung
1-V Linear CMOS Transconductor with 65 dB THD in Nano-Scale CMOS Technology. ISCAS (2007)
Tien-Yu Lo, Chung-Chih Hung, Mohammed Ismail
A wide tuning range Gm-C filter for multi-mode direct-conversion wireless receivers. ESSCIRC (2007)
Tien-Yu Lo, Chung-Chih Hung
A 1-V 50-MHz Pseudodifferential OTA With Compensation of the Mobility Reduction. IEEE Trans. Circuits Syst. II Express Briefs (12) (2007)
Tien-Yu Lo, Chung-Chih Hung
- C Continuous-Time Analog Filter. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2007)
Tien-Yu Lo, Chung-Chih Hung
A high speed and high linearity OTA in 1-V power supply voltage. ISCAS (2006)