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Suraj Kumar Saw
ORCID
Publication Activity (10 Years)
Years Active: 2019-2019
Publications (10 Years): 2
Top Topics
Evolvable Hardware
Frequency Response
Phase Locked Loop
Circuit Design
Top Venues
IEEE Trans. Circuits Syst. I Regul. Pap.
iSES
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Publications
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Alak Majumder
,
Monalisa Das
,
Suraj Kumar Saw
,
Abir J. Mondal
,
Bidyut K. Bhattacharyya
Variation Aware Design of 50-Gbit/s, 5.027-fJ/bit Serializer Using Latency Combined Mux-Dual Latch for Inter-Chip Communication.
IEEE Trans. Circuits Syst. I Regul. Pap.
(3) (2019)
Suraj Kumar Saw
,
Madhusudan Maiti
,
Preetisudha Meher
Design and Analysis of Dual Modulus Prescaler Circuit for Frequency Synthesizer.
iSES
(2019)