Sri Raga Sudha Garimella

Publication Activity (10 Years)

Years Active: 2007-2019
Publications (10 Years): 2

Top Topics

Hardware Architecture

Malware Detection

Multi Attribute

Top Venues

Publications

Lalitha Mohana Kalyani-Garimella, Sri Raga Sudha Garimella
Novel 3D Monotonic Characterization of Standard Cell Liberty File Attributes w.r.t ASIC Tool Flow. MWSCAS (2019)
Lalitha Mohana Kalyani-Garimella, Sri Raga Sudha Garimella
Novel 3D Monotonic Characterization of Standard Cell Liberty File Attributes w.r.t ASIC Tool Flow. MWSCAS (2018)
Lalitha Mohana Kalyani-Garimella, Sri Raga Sudha Garimella, Kevin Duda, Eric S. Fetzer
New generation carry look twice-ahead adder CL2A and carry look thrice-ahead adder CL3A. MWSCAS (2013)
Sri Raga Sudha Garimella
Highly Linear Wide Dynamic Swing CMOS Transconductance Multiplier Using Source-Degeneration V-I Converters. VLSI Design (2008)
Jaime Ramírez-Angulo, Lalitha Mohana Kalyani-Garimella, Annajirao Garimella, Sri Raga Sudha Garimella, Antonio J. López-Martín, Ramón González Carvajal
An Input Stage for the Implementation of Low-Voltage Rail to Rail Offset Compensated CMOS Comparators. VLSI Design (2008)
Sri Raga Sudha Garimella, Jaime Ramírez-Angulo, Antonio J. López-Martín, Ramón González Carvajal
Design of highly linear multipliers using floating gate transistors and/or source degeneration resistor. ISCAS (2008)
Jaime Ramírez-Angulo, Belén Calvo, Sri Raga Sudha Garimella, Santiago Celma, Maria Teresa Sanz
New highly-accurate CMOS source-degenerated based V-I converter with positive feedback. ECCTD (2007)