Annajirao Garimella

Publication Activity (10 Years)

Years Active: 2003-2018
Publications (10 Years): 2

Top Topics

Extreme Value Theory

Electrical Properties

Top Venues

Publications

Punith R. Surkanti, Annajirao Garimella, Paul M. Furth
Flipped Voltage Follower Based Low Dropout (LDO) Voltage Regulators: A Tutorial Overview. VLSI Design (2018)
Punith R. Surkanti, Annajirao Garimella, Mahender Manda, Paul M. Furth
On the analysis of low output impedance characteristic of flipped voltage follower (FVF) and FVF LDOs. MWSCAS (2017)
Sri Harsh Pakala, Mahender Manda, Punith R. Surkanti, Annajirao Garimella, Paul M. Furth
Voltage buffer compensation using Flipped Voltage Follower in a two-stage CMOS op-amp. MWSCAS (2015)
Annajirao Garimella, Punith R. Surkanti, Paul M. Furth
Embedded Tutorial ET1: Pole-Zero Analysis of Low-Dropout (LDO) Regulators: A Tutorial Overview. VLSI Design (2012)
Paul M. Furth, Sri Harsh Pakala, Annajirao Garimella, Chaitanya Mohan
A 22dB PSRR enhancement in a two-stage CMOS opamp using tail compensation. CICC (2012)
Annajirao Garimella, Punith R. Surkanti, Paul M. Furth
Pole-Zero Analysis of Low-Dropout (LDO) Regulators: A Tutorial Overview. VLSI Design (2012)
Paul M. Furth, Nitya R. Thota, Venkat Harish Nammi, Annajirao Garimella
Low dropout (LDO) voltage regulator design using split-length compensation. MWSCAS (2012)
Annajirao Garimella, M. Wasequr Rashid, Paul M. Furth
Single Miller compensation using inverting current buffer for multi-stage amplifiers. ISCAS (2010)
Annajirao Garimella, M. Wasequr Rashid, Paul M. Furth
Reverse Nested Miller Compensation Using Current Buffers in a Three-Stage LDO. IEEE Trans. Circuits Syst. II Express Briefs (4) (2010)
Annajirao Garimella, Paul M. Furth
A 1.21V, 100mA, 0.1µF-10µF output capacitor low drop-out voltage regulator for SoC applications. ICECS (2009)
Jaime Ramírez-Angulo, Lalitha Mohana Kalyani-Garimella, Annajirao Garimella, Sri Raga Sudha Garimella, Antonio J. López-Martín, Ramón González Carvajal
An Input Stage for the Implementation of Low-Voltage Rail to Rail Offset Compensated CMOS Comparators. VLSI Design (2008)
Jaime Ramírez-Angulo, Annajirao Garimella, Lalitha Mohana Kalyani-Garimella, Milind S. Sawant, Antonio Lopez-Martin, Ramón González Carvajal
Low voltage gain boosting schemes for one stage operational amplifiers. ECCTD (2007)
Lalitha Mohana Kalyani-Garimella, Annajirao Garimella, Jaime Ramírez-Angulo, Ramón González Carvajal, Antonio J. López-Martín
Low-Voltage Universal Cell (LVUC): A Compact Analog/Digital Logic Block for Mixed Signal FPGAs. CICC (2006)
Annajirao Garimella, M. V. V. Satyanarayana, R. Satish Kumar, P. S. Murugesh, U. C. Niranjan
VLSI Implementation of Online Digital Watermarking Technique with Difference Encoding for 8-Bit Gray Scale Images. VLSI Design (2003)