Sidhartha Sankar Rout

Publication Activity (10 Years)

Years Active: 2015-2023
Publications (10 Years): 18

Top Topics

Network On Chip

Compression Scheme

Top Venues

IEEE Trans. Emerg. Top. Comput.

Publications

Sidhartha Sankar Rout, Mitali Sinha, Sujay Deb
2DMAC: A Sustainable and Efficient Medium Access Control Mechanism for Future Wireless NoCs. ACM J. Emerg. Technol. Comput. Syst. 19 (3) (2023)
Sidhartha Sankar Rout, Badri M, Mitali Sinha, Sujay Deb
ReDeSIGN: Reuse of Debug Structures for Improvement in Performance Gain of NoC Based MPSoCs. IEEE Trans. Emerg. Top. Comput. 11 (2) (2023)
Mitali Sinha, Pramit Bhattacharyya, Sidhartha Sankar Rout, Neha Bhairavi Prakriya, Sujay Deb
Securing an Accelerator-Rich System From Flooding-Based Denial-of-Service Attacks. IEEE Trans. Emerg. Top. Comput. 10 (2) (2022)
Mitali Sinha, Setu Gupta, Sidhartha Sankar Rout, Sujay Deb
Sniffer: A Machine Learning Approach for DoS Attack Localization in NoC-Based SoCs. IEEE J. Emerg. Sel. Topics Circuits Syst. 11 (2) (2021)
Sidhartha Sankar Rout, Sujay Deb, Kanad Basu
WiND: An Efficient Post-Silicon Debug Strategy for Network on Chip. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (11) (2021)
Sidhartha Sankar Rout, Badri M, Sujay Deb
Reutilization of Trace Buffers for Performance Enhancement of NoC based MPSoCs. ASP-DAC (2020)
Sidhartha Sankar Rout, Akshat Singh, Suyog Bhimrao Patil, Mitali Sinha, Sujay Deb
Security Threats in Channel Access Mechanism of Wireless NoC and Efficient Countermeasures. ISCAS (2020)
Sidhartha Sankar Rout, Suyog Bhimrao Patil, Vaibhav Ishwarlal Chaudhari, Sujay Deb
Efficient Router Architecture for Trace Reduction During NoC Post-Silicon Validation. SoCC (2019)
Sidhartha Sankar Rout, Vaibhav Ishwarlal Chaudhari, Suyog Bhimrao Patil, Sujay Deb
RCAS: Critical Load Based Ranking for Efficient Channel Allocation in Wireless NoC. SoCC (2019)
Sidhartha Sankar Rout, Kanad Basu, Sujay Deb
Efficient Post-Silicon Validation of Network-on-Chip Using Wireless Links. VLSI Design (2019)
Priyanshi Gaur, Sidhartha Sankar Rout, Sujay Deb
Efficient Hardware Verification Using Machine Learning Approach. iSES (2019)
Sri Harsha Gade, Sidhartha Sankar Rout, Sujay Deb
On-Chip Wireless Channel Propagation: Impact of Antenna Directionality and Placement on Channel Performance. NOCS (2018)
Sri Harsha Gade, Sidhartha Sankar Rout, Ravi Kashyap, Sujay Deb
Reliability Analysis of On-Chip Wireless Links for Many Core WNoCs. DCIS (2018)
Ravi Kashyap, Twinkle Verma, Priyanka Kwatra, Sidhartha Sankar Rout
Efficient Data Compression Scheme for Secured Application Needs. VDAT (2018)
Sri Harsha Gade, Sidhartha Sankar Rout, Mitali Sinha, Hemanta Kumar Mondal, Wazir Singh, Sujay Deb
A Utilization Aware Robust Channel Access Mechanism for Wireless NoCs. ISCAS (2018)
Sri Harsha Gade, Mitali Sinha, Sidhartha Sankar Rout, Sujay Deb
Enabling Reliable High Throughput On-chip Wireless Communication for Many Core Architectures. ISVLSI (2018)
Mitali Sinha, Sidhartha Sankar Rout, Sri Harsha Gade, Sujay Deb
Near Threshold Last Level Cache for Energy Efficient Embedded Applications. IGSC (2018)
Sidhartha Sankar Rout, Hemanta Kumar Mondal, Rohan Juneja, Sri Harsha Gade, Sujay Deb
Dynamic NoC platform for varied application needs. ISQED (2018)
Deepak Baranwal, Digvijay Singh, Khanusiya Soyeb, Sidhartha Sankar Rout, Sujay Deb
Reliability Enhancement of SoCs Based on Dynamic Memory Access Profiling in Conjunction with PVT Monitoring. VLSI Design (2015)