Shyamapada Mukherjee

Publication Activity (10 Years)

Years Active: 2013-2023
Publications (10 Years): 14

Top Topics

Top Venues

J. Circuits Syst. Comput.

Publications

Sharbani Purkayastha, Shyamapada Mukherjee
PHetDP: A Placement Algorithm for Heterogeneous FPGAs with Delayed Packing. Circuits Syst. Signal Process. 42 (2) (2023)
Sumanta Banerjee, Shyamapada Mukherjee, Sivaji Bandyopadhyay, Partha Pakray
An extract-then-abstract based method to generate disaster-news headlines using a DNN extractor followed by a transformer abstractor. Inf. Process. Manag. 60 (3) (2023)
Yagnyasenee Sen Gupta, Shyamapada Mukherjee
A Reward-based Framework for Recovery and Utilization of Recyclable Wastes using Blockchain. OCIT (2022)
Sudeshna Kundu, Suchismita Roy, Shyamapada Mukherjee
Congestion-Aware Rectilinear Steiner Tree Construction Using PB-SAT. J. Circuits Syst. Comput. 31 (9) (2022)
Sudeshna Kundu, Suchismita Roy, Shyamapada Mukherjee
Rectilinear Steiner Tree Construction Techniques Using PB-SAT-Based Methodology. J. Circuits Syst. Comput. 29 (4) (2020)
Prasun Datta, Shyamapada Mukherjee
Architecture-aware routability-driven placer for large-scale mixed-size designs. IET Circuits Devices Syst. 13 (8) (2019)
Shyamapada Mukherjee, Kunal Chaudhary, Priya Jain, Bishal Paul
Gait Recognition using Segmented Motion Flow Energy Image. ICCCNT (2019)
Shyamapada Mukherjee, Neeraj Shivam, Astha Gangwal, Lokesh Khaitan, Amlan Jyoti Das
Spoken Language Recognition Using CNN. ICIT (2019)
Prasun Datta, Shyamapada Mukherjee
IPplacer: An Efficient 0-1 Integer Programming Based Placement for VLSI Circuits. ICCCNT (2018)
Shyamapada Mukherjee, A. Nainwal, C. C. Das, Sharbani Purkayastha
An Alternate Algorithmic Approach to FPGA Placement. ICCCNT (2018)
Shyamapada Mukherjee, Suchismita Roy
Via-Aware Dogleg Routing Using Boolean Satisfiability. J. Circuits Syst. Comput. 26 (4) (2017)
Sharbani Purkayastha, Shyamapada Mukherjee
Lookahead legalization based global placement for heterogeneous FPGAs. ISED (2017)
Sudeshna Kundu, Suchismita Roy, Shyamapada Mukherjee
K-nearest neighbour (KNN) approach using SAT based technique for rectilinear steiner tree construction. ISED (2017)
Shyamapada Mukherjee, Suchismita Roy
Nearly-2-SAT Solutions for Segmented-Channel Routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (1) (2016)
Shyamapada Mukherjee, Suchismita Roy
SAT based solutions for detailed routing of island style FPGA architectures. Microelectron. J. 46 (8) (2015)
Shyamapada Mukherjee, Suchismita Roy
Multi terminal net routing for island style FPGAs using nearly-2-SAT computation. VDAT (2015)
Shyamapada Mukherjee, Jibesh Patra, Suchismita Roy
Congestion Balancing Global Router. VDAT (2013)