Shwetabh Verma

Publication Activity (10 Years)

Years Active: 2003-2022
Publications (10 Years): 1

Top Topics

Recognition Scheme

Analog To Digital Converter

Top Venues

VLSI Technology and Circuits

IEEE J. Solid State Circuits

Publications

Aida Varzaghani, Bardia Bozorgzadeh, Jack Lam, Ankush Goel, Xiaobin Yuan, Mohamed Elzeftawi, Mehran Izad, Sudipta Sarkar, Alberto Baldisserotto, Seong-Ryong Ryu, Steven Mikes, Jeffrey Hwang, Varun Joshi, Shahrzad Naraghi, Darshan Kadia, Mohammad Ranjbar, Paul Lee, Dimitri Loizos, Sotirios Zogopoulos, Shwetabh Verma, Stefanos Sidiropoulos
A 1-to-112Gb/s DSP-Based Wireline Transceiver with a Flexible Clocking Scheme in 5nm FinFET. VLSI Technology and Circuits (2022)
Aida Varzaghani, Athos Kasapi, Dimitri Loizos, Song-Hee Paik, Shwetabh Verma, Sotirios Zogopoulos, Stefanos Sidiropoulos
A 10.3-GS/s, 6-Bit Flash ADC for 10G Ethernet Applications. IEEE J. Solid State Circuits 48 (12) (2013)
Shwetabh Verma, Athos Kasapi, Li-min Lee, Dean Liu, Dimitri Loizos, Song-Hee Paik, Aida Varzaghani, Sotirios Zogopoulos, Stefanos Sidiropoulos
A 10.3GS/s 6b flash ADC for 10G Ethernet applications. ISSCC (2013)
Shahriar Rabii, Nikhil Acharya, Pak Chau, Joseph Dao, Arnold Feldman, Haw-Jyh Liaw, Dean Liu, Marc Loinaz, Manuel Luschas, Azmeer Salleh, Siddharth Sheth, Stefanos Sidiropoulos, Donald Stark, Shwetabh Verma
An integrated VCSEL driver for 10Gb ethernet in 0.13µm CMOS. ISSCC (2006)
Shwetabh Verma, Junfeng Xu, Mototsugu Hamada, Thomas H. Lee
A 17-mW 0.66-mm/sup 2/ direct-conversion receiver for 1-Mb/s cable replacement. IEEE J. Solid State Circuits 40 (12) (2005)
Shwetabh Verma, Junfeng Xu, Thomas H. Lee
A multiply-by-3 coupled-ring oscillator for low-power frequency synthesis. IEEE J. Solid State Circuits 39 (4) (2004)
Shwetabh Verma, Hamid R. Rategh, Thomas H. Lee
A unified model for injection-locked frequency dividers. IEEE J. Solid State Circuits 38 (6) (2003)