Shounak Dhar

Publication Activity (10 Years)

Years Active: 2016-2021
Publications (10 Years): 13

Top Topics

Integrated Circuit

Dynamic Programming

Gpu Accelerated

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Yibo Lin, Zixuan Jiang, Jiaqi Gu, Wuxi Li, Shounak Dhar, Haoxing Ren, Brucek Khailany, David Z. Pan
DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (4) (2021)
Shounak Dhar, Love Singhal, Mahesh A. Iyer, David Z. Pan
A shape-driven spreading algorithm using linear programming for global placement. ASP-DAC (2019)
Shounak Dhar, Love Singhal, Mahesh A. Iyer, David Z. Pan
FPGA Accelerated FPGA Placement. FPL (2019)
Shounak Dhar, Love Singhal, Mahesh A. Iyer, David Z. Pan
FPGA-Accelerated Spreading for Global Placement. HPEC (2019)
Yibo Lin, Shounak Dhar, Wuxi Li, Haoxing Ren, Brucek Khailany, David Z. Pan
DREAMPlace: Deep Learning Toolkit-Enabled GPU Acceleration for Modern VLSI Placement. DAC (2019)
Zheng Zhao, Zheng Wang, Zhoufeng Ying, Shounak Dhar, Ray T. Chen, David Z. Pan
Logic synthesis for energy-efficient photonic integrated circuits. ASP-DAC (2018)
Wuxi Li, Yibo Lin, Meng Li, Shounak Dhar, David Z. Pan
UTPlaceF 2.0: A High-Performance Clock-Aware FPGA Placement Engine. ACM Trans. Design Autom. Electr. Syst. 23 (4) (2018)
Shounak Dhar, David Z. Pan
GDP: GPU accelerated Detailed Placement. HPEC (2018)
Wuxi Li, Shounak Dhar, David Z. Pan
UTPlaceF: A Routability-Driven FPGA Placer With Physical and Congestion Aware Packing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (4) (2018)
Zheng Zhao, Zheng Wang, Zhoufeng Ying, Shounak Dhar, Ray T. Chen, David Z. Pan
Optical computing on silicon-on-insulator-based photonic integrated circuits. ASICON (2017)
Shounak Dhar, Mahesh A. Iyer, Saurabh N. Adya, Love Singhal, Nikolay Rubanov, David Z. Pan
An Effective Timing-Driven Detailed Placement Algorithm for FPGAs. ISPD (2017)
Shounak Dhar, Saurabh N. Adya, Love Singhal, Mahesh A. Iyer, David Z. Pan
Detailed placement for modern FPGAs using 2D dynamic programming. ICCAD (2016)
Wuxi Li, Shounak Dhar, David Z. Pan
UTPlaceF: a routability-driven FPGA placer with physical and congestion aware packing. ICCAD (2016)