UTPlaceF: A Routability-Driven FPGA Placer With Physical and Congestion Aware Packing.
Wuxi LiShounak DharDavid Z. PanPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2018)
Keyphrases
- high speed
- real time image processing
- real time
- hardware implementation
- signal processing
- field programmable gate array
- neural network
- traffic volume
- real time traffic
- dedicated hardware
- travel time
- packet loss
- low cost
- real world
- physical world
- data acquisition
- software implementation
- shortest path
- learning algorithm
- parallel hardware