Shinji Nishimura

Publication Activity (10 Years)

Years Active: 1991-2014
Publications (10 Years): 0

Top Topics

Computationally Expensive

Successive Approximation

Top Venues

IEICE Trans. Commun.

IEEE J. Solid State Circuits

Publications

Takashi Takemoto, Hiroki Yamashita, Fumio Yuki, Noboru Masuda, Hidehiro Toyoda, Norio Chujo, Yong Lee, Shinji Tsuji, Shinji Nishimura
A 25-Gb/s 2.2-W 65-nm CMOS Optical Transceiver Using a Power-Supply-Variation-Tolerant Analog Front End and Data-Format Conversion. IEEE J. Solid State Circuits 49 (2) (2014)
Takashi Takemoto, Hiroki Yamashita, Fumio Yuki, Shinji Tsuji, Yong Lee, Koichiro Adachi, Kazunori Shinoda, Yasunobu Matsuoka, Toshiki Sugawara, Shinji Nishimura, Norio Chujo, Masaaki Nido, Kazuhiko Kurata, Junji Baba, Yoshinori Watanabe, Naoya Ikeda
Compact and power-efficient 100-Gbps CMOS-based transceiver. OFC/NFOEC (2013)
Takashi Takemoto, Hiroki Yamashita, Takehito Kamimura, Fumio Yuki, Noboru Masuda, Hidehiro Toyoda, Norio Chujo, Kenji Kogo, Yong Lee, Shinji Tsuji, Shinji Nishimura
A 25-Gb/s 2.2-W optical transceiver using an analog FE tolerant to power supply noise and redundant data format conversion in 65-nm CMOS. VLSIC (2012)
Masashi Kono, Akihiro Kambe, Hidehiro Toyoda, Shinji Nishimura
A Novel 400-Gb/s (100-Gb/s×4) Physical-Layer Architecture Using Low-Power Technology. IEICE Trans. Commun. (11) (2012)
Goichi Ono, Keiki Watanabe, Takashi Muto, Hiroki Yamashita, Koji Fukuda, Noboru Masuda, Ryo Nemoto, Eiichi Suzuki, Takashi Takemoto, Fumio Yuki, Masayoshi Yagyu, Hidehiro Toyoda, Akihiro Kambe, Tatsuya Saito, Shinji Nishimura
10: 4 MUX and 4: 10 DEMUX gearbox LSI for 100-gigabit Ethernet link. ISSCC (2011)
Goichi Ono, Keiki Watanabe, Takashi Muto, Hiroki Yamashita, Koji Fukuda, Noboru Masuda, Ryo Nemoto, Eiichi Suzuki, Takashi Takemoto, Fumio Yuki, Masayoshi Yagyu, Hidehiro Toyoda, Masashi Kono, Akihiro Kambe, Seiichi Umai, Tatsuya Saito, Shinji Nishimura
A 10: 4 MUX and 4: 10 DEMUX Gearbox LSI for 100-Gigabit Ethernet Link. IEEE J. Solid State Circuits 46 (12) (2011)
Takashi Takemoto, Fumio Yuki, Hiroki Yamashita, Shinji Tsuji, Tatsuya Saito, Shinji Nishimura
A 25 Gb/s × 4-channel 74 mW/ch transimpedance amplifier in 65 nm CMOS. CICC (2010)
Hidehiro Toyoda, Goichi Ono, Shinji Nishimura
100GbE PHY and MAC layer implementations. IEEE Commun. Mag. 48 (3) (2010)
Hidehiro Toyoda, Michitaka Okuno, Shinji Nishimura, Matsuaki Terada
A 100 Gb/s and High-Reliable Physical-Layer Architecture for VSR and Backplane Ethernet. ICC (2008)
Masaki Yamada, Takeki Yazaki, Shinji Nishimura, Naoya Ikeda
Technologies to Save Power for Carrier Class Routers and Switches. SAINT (2008)
Hidehiro Toyoda, Shinji Nishimura, Michitaka Okuno, Matsuaki Terada
A 100-Gb/s-Physical-Layer Architecture for Higher-Speed Ethernet for VSR and Backplane Applications. IEICE Trans. Electron. (10) (2007)
Takashi Ishikawa, Seishi Hanaoka, Mikio Kataoka, Masashi Yano, Shinji Nishimura
Basic Simulation Result of Inter System Handover for Cognitive Radio. FGCN (2) (2007)
Hidehiro Toyoda, Shinji Nishimura, Michitaka Okuno, Kouji Fukuda, Kouji Nakahara, Hiroaki Nishi
100-Gb/s Physical-Layer Architecture for Next-Generation Ethernet. IEICE Trans. Commun. (3) (2006)
Michitaka Okuno, Shinji Nishimura, Shinichi Ishida, Hiroaki Nishi
Cache-Based Network Processor Architecture: Evaluation with Real Network Traffic. IEICE Trans. Electron. (11) (2006)
Hidehiro Toyoda, Shinji Nishimura, Michitaka Okuno, Ryouji Yamaoka, Hiroaki Nishi
A 100-Gb-Ethernet subsystem for next-generation metro-area network. ICC (2005)
Shinji Nishimura, Tomohiro Kudoh, Hiroaki Nishi, Junji Yamamoto, R. Ueno, Katsuyoshi Harasawa, Shuji Fukuda, Yasutaka Shikichi, Shigeto Akutsu, Koji Tasho, Hideharu Amano
RHiNET-3/SW: an 80-Gbit/s high-speed network switch for distributed parallel computing. Hot Interconnects (2001)
Shinji Nishimura, Katsuyoshi Harasawa, N. Matsudaira, Shigeto Akutsu, Tomohiro Kudoh, Hiroaki Nishi, Hideharu Amano
RHiNET-2/SW a Hight-throughput, Compact Network-switch Using 8.8-Gbit/s Optical Interconnection. New Gener. Comput. 18 (2) (2000)
Tetsuo Tajiri, Yutaka Suzuki, Shinji Nishimura, Hiroshi Yoshimura
Single board video codec for ISDN visual telephone. ICASSP (1991)