Shen-Yu Peng

Publication Activity (10 Years)

Years Active: 2012-2015
Publications (10 Years): 2

Top Topics

Power Management

Prime Implicants

Top Venues

IEEE J. Solid State Circuits

Publications

Yi-Ping Su, Chiun-He Lin, Shen-Yu Peng, Ru-Yu Huang, Te-Fu Yang, Shin-Hao Chen, Ting-Jung Lo, Ke-Horng Chen, Chin-Long Wey, Ying-Hsi Lin, Chao-Cheng Lee, Jian-Ru Lin, Tsung-Yen Tsai
12.6 90% Peak efficiency single-inductor-multiple-output DC-DC buck converter with output independent gate drive control. ISSCC (2015)
Yen-Ting Lin, Shin-Chi Lai, Shin-Hao Chen, Shen-Yu Peng, Ke-Horng Chen, Sheng Kang, Kevin Cheng, Ying-Hsi Lin, Chen-Chih Huang, Chao-Cheng Lee
99.4% peak audio signal recovery rate and ultra-low 0.32dB matching error with 10Hz high resolution filter fitting wearable aided speech compensation system. A-SSCC (2015)
Shin-Hao Chen, Shen-Yu Peng, Ke-Horng Chen, Shin-Chi Lai, Sheng Kang, Kevin Cheng, Ying-Hsi Lin, Chen-Chih Huang, Chao-Cheng Lee
A 2.5W tablet speaker delivering 3.2W pseudo high power by psychoacoustic model based adaptive power management system. A-SSCC (2014)
Shen-Yu Peng, Tzu-Chi Huang, Yu-Huei Lee, Chao-Chang Chiu, Ke-Horng Chen, Ying-Hsi Lin, Chao-Cheng Lee, Tsung-Yen Tsai, Chen-Chih Huang, Long-Der Chen, Cheng-Chen Yang
Instruction-Cycle-Based Dynamic Voltage Scaling Power Management for Low-Power Digital Signal Processor With 53% Power Savings. IEEE J. Solid State Circuits 48 (11) (2013)
Yu-Huei Lee, Shen-Yu Peng, Chao-Chang Chiu, Alex Chun-Hsien Wu, Ke-Horng Chen, Ying-Hsi Lin, Shih-Wei Wang, Tsung-Yen Tsai, Chen-Chih Huang, Chao-Cheng Lee
A Low Quiescent Current Asynchronous Digital-LDO With PLL-Modulated Fast-DVS Power Management in 40 nm SoC for MIPS Performance Improvement. IEEE J. Solid State Circuits 48 (4) (2013)
Yu-Huei Lee, Shen-Yu Peng, Alex Chun-Hsien Wu, Chao-Chang Chiu, Yao-Yi Yang, Ming-Hsin Huang, Ke-Horng Chen, Ying-Hsi Lin, Shih-Wei Wang, Ching-Yuan Yeh, Chen-Chih Huang, Chao-Cheng Lee
A 50nA quiescent current asynchronous digital-LDO with PLL-modulated fast-DVS power management in 40nm CMOS for 5.6 times MIPS performance. VLSIC (2012)
Yu-Huei Lee, Chao-Chang Chiu, Shen-Yu Peng, Ke-Horng Chen, Ying-Hsi Lin, Chao-Cheng Lee, Chen-Chih Huang, Tsung-Yen Tsai
A Near-Optimum Dynamic Voltage Scaling (DVS) in 65-nm Energy-Efficient Power Management With Frequency-Based Control (FBC) for SoC System. IEEE J. Solid State Circuits 47 (11) (2012)