Sharareh Zamanzadeh

Publication Activity (10 Years)

Years Active: 2008-2017
Publications (10 Years): 6

Top Topics

Design Methodology

Encryption Algorithm

Conceptual Schema

Reverse Engineer

Top Venues

ISC Int. J. Inf. Secur.

J. Electron. Test.

Int. J. High Perform. Syst. Archit.

Publications

Sharareh Zamanzadeh, Ali Jahanian
Scalable security path methodology: A cost-security trade-off to protect FPGA IPs against active and passive tampers. AsianHOST (2017)
Sharareh Zamanzadeh, Ali Jahanian
ASIC design protection against reverse engineering during the fabrication process using automatic netlist obfuscation design flow. ISC Int. J. Inf. Secur. 8 (2) (2016)
Sharareh Zamanzadeh, Shahram Shahabi, Ali Jahanian
Security improvement of FPGA configuration file against the reverse engineering attack. ISCISC (2016)
Sharareh Zamanzadeh, Ali Jahanian
Security Path: An Emerging Design Methodology to Protect the FPGA IPs Against Passive/Active Design Tampering. J. Electron. Test. 32 (3) (2016)
Sharareh Zamanzadeh, Ali Jahanian
Self authentication path insertion in FPGA-based design flow for tamper-resistant purpose. ISC Int. J. Inf. Secur. 8 (1) (2016)
Sharareh Zamanzadeh, Ali Jahanian
Higher security of ASIC fabrication process against reverse engineering attack using automatic netlist encryption methodology. Microprocess. Microsystems 42 (2016)
Sharareh Zamanzadeh, Ali Jahanian
Automatic netlist scrambling methodology in ASIC design flow to hinder the reverse engineering. VLSI-SoC (2013)
Shima Mehrabi, Reza Faghih Mirzaee, Sharareh Zamanzadeh, Keivan Navi, Omid Hashemipour
Design, analysis, and implementation of partial product reduction phase by using wide m: 3 (4 ≤ m ≤ 10) compressors. Int. J. High Perform. Syst. Archit. 4 (4) (2013)
Sharareh Zamanzadeh, Mohammad Mirza-Aghatabar, Mehrdad Najibi, Hossein Pedram, Abolghasem Sadeghi
Reimbursing the Handshake Overhead of Asynchronous Circuits using Compiler Pre-Synthesis Optimizations. DSD (2008)
Sharareh Zamanzadeh, Mehrdad Najibi, Hossein Pedram
Pre-synthesis Optimization for Asynchronous Circuits Using Compiler Techniques. CSICC (2008)