Sha Shen

Publication Activity (10 Years)

Years Active: 2011-2014
Publications (10 Years): 0

Top Topics

Motion Compensation

Rate Control Scheme

Vlsi Architecture

Top Venues

IEICE Electron. Express

IEICE Trans. Fundam. Electron. Commun. Comput. Sci.

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Qing Shang, Yibo Fan, Weiwei Shen, Sha Shen, Xiaoyang Zeng
Single-Port SRAM-Based Transpose Memory With Diagonal Data Mapping for Large Size 2-D DCT/IDCT. IEEE Trans. Very Large Scale Integr. Syst. 22 (11) (2014)
Sha Shen, Weiwei Shen, Yibo Fan, Xiaoyang Zeng
A Unified Forward/Inverse Transform Architecture for Multi-Standard Video Codec Design. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (7) (2013)
Weiwei Shen, Qing Shang, Sha Shen, Yibo Fan, Xiaoyang Zeng
A high-throughput VLSI architecture for deblocking filter in HEVC. ISCAS (2013)
Sha Shen, Weiwei Shen, Yibo Fan, Xiaoyang Zeng
A pipelined VLSI architecture for Sample Adaptive Offset (SAO) filter and deblocking filter of HEVC. IEICE Electron. Express 10 (11) (2013)
Sha Shen, Weiwei Shen, Yibo Fan, Xiaoyang Zeng
A Unified 4/8/16/32-Point Integer IDCT Architecture for Multiple Video Coding Standards. ICME (2012)
Huibo Zhong, Sha Shen, Yibo Fan, Xiaoyang Zeng
A Low Complexity Macroblock Layer Rate Control Scheme Base on Weighted-Window for H.264 Encoder. MMM (2012)
Huibo Zhong, Sha Shen, Yibo Fan, Xiaoyang Zeng
A two-way parallel CAVLC encoder for 4K×2K H.264/AVC. ASICON (2011)
Sha Shen, Huibo Zhong, Yibo Fan, Xiaoyang Zeng
A hardware/software co-design approach for multiple-standard video bitstream parsing. ASICON (2011)
Huibo Zhong, Sha Shen, Yibo Fan, Xiaoyang Zeng
A 4-way parallel CAVLC design for H.264/AVC 4Kx2K 60fps encoder. IEICE Electron. Express 8 (22) (2011)