A high-throughput VLSI architecture for deblocking filter in HEVC.
Weiwei ShenQing ShangSha ShenYibo FanXiaoyang ZengPublished in: ISCAS (2013)
Keyphrases
- high throughput
- vlsi architecture
- low complexity
- low power
- microarray
- real time
- video coding standard
- motion estimation
- mode decision
- computational complexity
- video compression
- video streaming
- distributed video coding
- video codec
- data acquisition
- low bit rate
- low cost
- video coding
- motion vectors
- high speed
- transform domain
- multiscale
- motion compensated
- motion compensation
- frequency domain