A pipelined VLSI architecture for Sample Adaptive Offset (SAO) filter and deblocking filter of HEVC.
Sha ShenWeiwei ShenYibo FanXiaoyang ZengPublished in: IEICE Electron. Express (2013)
Keyphrases
- deblocking filter
- vlsi architecture
- low power
- low complexity
- video communication
- power consumption
- low cost
- high speed
- adaptive filtering
- video streaming
- video coding standard
- vlsi implementation
- low bit rate
- real time
- blocking artifacts
- coding method
- video codec
- video coding
- mode decision
- wireless channels
- high definition
- coding efficiency
- motion compensation
- motion estimation