Satoru Isomura

Publication Activity (10 Years)

Years Active: 1996-2000
Publications (10 Years): 0

Publications

Toru Hiyama, Yuko Ito, Satoru Isomura, Kazunobu Nojiri, Eijiro Maeda
Advanced Wiring RC Timing Design Techniques for Logic LSIs in Gigahertz Era and Beyond. ICCD (2000)
Keiichi Higeta, Masami Usami, Masayuki Ohayashi, Yasuhiro Fujimura, Masahiko Nishiyama, Satoru Isomura, Kunihiko Yamaguchi, Youji Idei, Hiroaki Nambu, Kenichi Ohhata, Nadateru Hanta
A soft-error-immune 0.9-ns 1.15-Mb ECL-CMOS SRAM with 30-ps 120 k logic gates and on-chip test circuitry. IEEE J. Solid State Circuits 31 (10) (1996)