Login / Signup
Satomi Kusanagi
Publication Activity (10 Years)
Years Active: 2004-2004
Publications (10 Years): 0
</>
Publications
</>
Keiji Kishine
,
Kyoko Fujimoto
,
Satomi Kusanagi
,
Haruhiko Ichino
PLL design technique by a loop-trajectory analysis taking decision-circuit phase margin into account for over-10-Gb/s clock and data recovery circuits.
IEEE J. Solid State Circuits
39 (5) (2004)