S. Ramanathan

Publication Activity (10 Years)

Years Active: 1990-2018
Publications (10 Years): 1

Top Topics

Evolutionary Algorithm

Software Components

Top Venues

Publications

Jagadamaba Prasad Singh, S. M. Kattimani, Rakesh Kumar, S. Ramanathan, G. N. V. Prasad
Need aspect approval system for procurement of components used for INDIAN satellite program. RAIT (2018)
S. Ramanathan, S. K. Nandy, V. Visvanathan
Reconfigurable Filter Coprocessor Architecture for DSP Applications. J. VLSI Signal Process. 26 (3) (2000)
S. Ramanathan, V. Visvanathan, S. K. Nandy
Architectural Synthesis of Computational Engines for Subband Adaptive Filtering. J. VLSI Signal Process. 22 (3) (1999)
S. Ramanathan, V. Visvanathan, S. K. Nandy
Synthesis of Configurable Architectures for DSP Algorithms. VLSI Design (1999)
S. Ramanathan, V. Visvanathan, S. K. Nandy
A computational engine for multirate FIR digital filtering. Signal Process. 79 (2) (1999)
S. Ramanathan, V. Visvanathan, S. K. Nandy
Synthesis of ASIPs for DSP algorithms. Integr. 28 (1) (1999)
S. Ramanathan, V. Visvanathan
Low-power pipelined LMS adaptive filter architectures with minimal adaptation delay1. Integr. 27 (1) (1999)
S. Ramanathan, V. Visvanathan
Low-Power Configurable Processor Array for DLMS Adaptive Filtering. VLSI Design (1997)
S. Ramanathan, V. Visvanathan
A systolic architecture for LMS adaptive filtering with minimal adaptation delay. VLSI Design (1996)
V. Visvanathan, S. Ramanathan
A modular systolic architecture for delayed least mean squares adaptive filtering. VLSI Design (1995)
S. Ramanathan, Nibedita Mohanty, V. Visvanathan
A Methodology for Generating Application Specific Tree Multipliers. VLSI Design (1993)
V. Visvanathan, Nibedita Mohanty, S. Ramanathan
An Area-Efficient Systolic Architecture for Real-Time VLSI Finite Impulse Response Filters. VLSI Design (1993)
S. Ramanathan, G. Sivakumar
Rewrite Systems for Protocol Specification and Verification. FORTE (1990)