S. M. Aziz

Publication Activity (10 Years)

Years Active: 1993-1998
Publications (10 Years): 0

Publications

S. M. Aziz, Joarder Kamruzzaman
Fault Characterization of Low Capacitance Full-Swing BiCMOS Logic Circuits. Asian Test Symposium (1998)
S. M. Aziz
A C-testable modified Booth's array multiplier. VLSI Design (1995)
S. M. Aziz, W. A. J. Waller
On Testability of Differential Split-Level CMOS Circuits. VLSI Design (1994)
W. A. J. Waller, S. M. Aziz
A C-testable parallel multiplier using differential cascode voltage switch (DDVS) logic. VLSI (1993)