Ruey-Liang Ma

Publication Activity (10 Years)

Years Active: 1994-2002
Publications (10 Years): 0

Publications

Li-Hsun Chen, Wei-Lung Liu, Oscal T.-C. Chen, Ruey-Liang Ma
A reconfigurable digital signal processor architecture for high-efficiency MPEG-4 video encoding. ICME (2) (2002)
Robin R.-B. Sheen, S. Wang, Oscal T.-C. Chen, Ruey-Liang Ma
Power consumption of a 2's complement adder minimized by effective dynamic data ranges. ISCAS (1) (1999)
Ruey-Liang Ma, Chung-Ping Chung
Reducing Memory Traffic and Accelerting Prolog Execution in a Superscalar Prolog System. J. Inf. Sci. Eng. 15 (6) (1999)
Lee-Ren Ton, Lung-Chung Chang, Min-Fu Kao, Han-Min Tseng, Shi-Sheng Shang, Ruey-Liang Ma, Dze-Chaung Wang, Chung-Ping Chung
Instruction Folding in Java Processor. ICPADS (1997)
Ruey-Liang Ma, Chung-Ping Chung
Periodic Adaptive Branch Prediction and its Application in Superscalar Processing in Prolog. Comput. J. 38 (6) (1995)
Ruey-Liang Ma, Chung-Ping Chung
Branch Prediction for Enhancing Fine-Grained Parallelism in Prolog. ICPADS (1994)