A reconfigurable digital signal processor architecture for high-efficiency MPEG-4 video encoding.
Li-Hsun ChenWei-Lung LiuOscal T.-C. ChenRuey-Liang MaPublished in: ICME (2) (2002)
Keyphrases
- high efficiency
- digital signal processor
- video encoding
- texas instruments
- low complexity
- digital video
- real time
- high accuracy
- motion estimation
- video sequences
- low cost
- low bit rate
- multimedia
- hardware implementation
- resource constrained
- video encoder
- video compression
- video objects
- reduce the computational complexity