Robert H. Klenke

Publication Activity (10 Years)

Years Active: 1992-2019
Publications (10 Years): 2

Top Topics

Cyber Physical Systems

Monitoring System

Embedded Systems

Discrete Event Simulation

Top Venues

Publications

Smitha Gautham, Georgios Bakirtzis, Matthew T. Leccadito, Robert H. Klenke, Carl R. Elks
A multilevel cybersecurity and safety monitor for embedded cyber-physical systems: WIP abstract. ICCPS (2019)
Smitha Gautham, Georgios Bakirtzis, Matthew T. Leccadito, Robert H. Klenke, Carl R. Elks
A Multilevel Cybersecurity and Safety Monitor for Embedded Cyber-Physical Systems. CoRR (2018)
Siva Teja Patibandla, Tim Bakker, Robert H. Klenke
Initial evaluation of an IEEE 802.11s-based mobile ad-hoc network for collaborative Unmanned Aerial Vehicles. ICCVE (2013)
Tim Bakker, Garrett L. Ward, Siva T. Patibandla, Robert H. Klenke
RAMS: a fast, low-fidelity, multiple agent discrete-event simulator. SummerSim (2013)
Fadi Obeidat, Robert H. Klenke
Microblaze: an application-independent fpga-based profiler (abstract only). FPGA (2011)
Fadi Obeidat, Robert H. Klenke
Introducing MicroBlaze as an infrastructure for performance modeling. MSE (2011)
Fadi Obeidat, Robert H. Klenke
Application-Independent FPGA-based Profiling. ERSA (2010)
Fadi Obeidat, Jose Ortiz, Jeremy Cooper, Assem A. R. Bsoul, Robert H. Klenke
Embedded Systems Performance Modeling using FPGA-based Profiling. ESA (2010)
Robert H. Klenke
Experiences Using the Xilinx Microblaze Softcore Processor and uCLinux in Computer Engineering Capstone Senior Design Projects. MSE (2007)
Sam Mitchum, Robert H. Klenke
Design and fabrication of a digitally synthesized, digitally controlled ring oscillator. Circuits, Signals, and Systems (2005)
Robert H. Klenke
A UAV-Based Computer Engineering Capstone Senior Design Project. MSE (2005)
Ronald D. Williams, Robert H. Klenke, James H. Aylor
Teaching computer design using virtual prototyping. IEEE Trans. Educ. 46 (2) (2003)
Robert H. Klenke, Jerry H. Tucker, Jason M. Blevins
A New Hardware/Software Codesign Environment and Senior Capstone Design Project for Computer Engineering. MSE (2003)
Jason J. Hein, James H. Aylor, Robert H. Klenke
Performance-Based System Design Education. MSE (2003)
Robert H. Klenke, James H. Aylor
A Proposed Modeling Environment to Teach Performance Modeling and Hardware/Software Codesign to Senior Undergraduates. MSE (2003)
Robert H. Klenke
Design of a 32-Bit Microprocessor in an Undergraduate VLSI Design Course. MSE (2001)
Gang Han, Robert H. Klenke, James H. Aylor
Performance Modeling of Hierarchical Crossbar-Based Multicomputer Systems. IEEE Trans. Computers 50 (9) (2001)
Robert H. Klenke, James H. Aylor, Moshe Meyassed, William W. Dungan
Interfaces for mixed-level simulation with sequential elements. J. Syst. Archit. 47 (2) (2001)
Robert H. Klenke
A Hardware/Software Codesign Senior Capstone Design Project in Computer Engineering. MSE (2001)
Sally A. McKee, William A. Wulf, James H. Aylor, Robert H. Klenke, Maximo H. Salinas, Sung I. Hong, Dee A. B. Weikle
Dynamic Access Ordering for Streamed Computations. IEEE Trans. Computers 49 (11) (2000)
Tianjing Jiang, Robert H. Klenke, James H. Aylor, Gang Han
System level testability analysis using Petri nets. HLDVT (2000)
Sung I. Hong, Sally A. McKee, Maximo H. Salinas, Robert H. Klenke, James H. Aylor, William A. Wulf
Access Order and Effective Bandwidth for Streams on a Direct Rambus Memory. HPCA (1999)
Moshe Meyassed, Robert H. Klenke, James H. Aylor
Resolving unknown inputs in mixed-level simulation with sequential elements. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18 (8) (1999)
Sally A. McKee, Robert H. Klenke, Kenneth L. Wright, William A. Wulf, Maximo H. Salinas, James H. Aylor, Alan P. Batson
Smarter Memory: Improving Bandwidth for Streamed References. Computer 31 (7) (1998)
Robert M. McGraw, James H. Aylor, Robert H. Klenke
A Top-Down Design Environment for Developing Pipelined Datapaths. DAC (1998)
Robert H. Klenke, James H. Aylor
An undergraduate advanced computer design course using virtual-prototyping. MSE (1997)
Robert H. Klenke, Moshe Meyassed, James H. Aylor, Barry W. Johnson, Ramesh Rao, Anup Ghosh
An Integrated Design Environment for Performance and Dependability Analysis. DAC (1997)
Joseph M. Wolf, Lori M. Kaufman, Robert H. Klenke, James H. Aylor, Ronald Waxman
An analysis of fault partitioned parallel test generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15 (5) (1996)
Robert H. Klenke, James H. Aylor, Joseph M. Wolf
An analysis of fault partitioning algorithms for fault partitioned ATPG. VTS (1996)
Sally A. McKee, Assaji Aluwihare, Benjamin H. Clark, Robert H. Klenke, Trevor C. Landon, Christopher W. Oliver, Maximo H. Salinas, Adam E. Szymkowiak, Kenneth L. Wright, William A. Wulf, James H. Aylor
Design and Evaluation of Dynamic Access Ordering Hardware. International Conference on Supercomputing (1996)
Robert M. McGraw, Moshe Meyassed, Robert H. Klenke, James H. Aylor, Ronald D. Williams
Refinement of system-level designs using hybrid modeling. ICECCS (1995)
Sally A. McKee, Robert H. Klenke, Andrew J. Schwab, William A. Wulf, Steven A. Moyer, James H. Aylor, Charles Y. Hitchcock
Experimental Implementation of Dynamic Access Ordering. HICSS (1) (1994)
Robert H. Klenke, Lori M. Kaufman, James H. Aylor, Ronald Waxman, Padmini Narayan
Workstation Based Parallel Test Generation. ITC (1993)
Robert H. Klenke, Ronald D. Williams, James H. Aylor
Parallelization methods for circuit partitioning based parallel automatic test pattern generation. VTS (1993)
Robert H. Klenke, Ronald D. Williams, James H. Aylor
Parallel-Processing Techniques for Automatic Test Pattern Generation. Computer 25 (1) (1992)