Raymond Hoare

Publication Activity (10 Years)

Years Active: 1996-2007
Publications (10 Years): 0

Publications

Alex K. Jones, Raymond Hoare, Swapna R. Dontharaju, Shen Chih Tung, Ralph Sprang, Joshua Fazekas, James T. Cain, Marlin H. Mickle
An automated, FPGA-based reconfigurable, low-power RFID tag. Microprocess. Microsystems 31 (2) (2007)
Alex K. Jones, Raymond Hoare, Dara Kusic, Gayatri Mehta, Joshua Fazekas, John Foster
Reducing power while increasing performance with supercisc. ACM Trans. Embed. Comput. Syst. 5 (3) (2006)
Jeffrey William Schuster, Kshitij Gupta, Raymond Hoare, Alex K. Jones
Speech Silicon: An FPGA Architecture for Real-Time Hidden Markov-Model-Based Speech Recognition. EURASIP J. Embed. Syst. 2006 (2006)
Joshua M. Lucas, Raymond Hoare, Ivan S. Kourtev, Alex K. Jones
Technology mapping for Field Programmable Gate Arrays using Content-Addressable Memory (CAM). Microprocess. Microsystems 30 (7) (2006)
Joshua M. Lucas, Raymond Hoare, Alex K. Jones
Optimizing Technology Mapping for FPGAs Using CAMs. FCCM (2005)
Dara Kusic, Raymond Hoare, Alex K. Jones, Joshua Fazekas, John Foster
Extracting Speedup From C-Code With Poor Instruction-Level Parallelism. IPDPS (2005)
Alex K. Jones, Raymond Hoare, Dara Kusic, Joshua Fazekas, John Foster
An FPGA-based VLIW processor with custom hardware execution. FPGA (2005)
Raymond Hoare, Shen Chih Tung, Katrina Werger
An 88-Way Multiprocessor within an FPGA with Customizable Instructions. IPDPS (2004)
Alex K. Jones, Raymond Hoare, Ivan S. Kourtev, Joshua Fazekas, Dara Kusic, John Foster, Sedric Boddie, Ahmed Muaydh
A 64-way VLIW/SIMD FPGA architecture and design flow. ICECS (2004)
Raymond Hoare, Shen Chih Tung
Combining Mentor Graphics? HDL Designer FPGA Flow with a Reconfigurable System on a Programmable Chip, Educational Opportunity or Insanity? MSE (2003)
David Reed, Raymond Hoare
An SoC Solution for Massive Parallel Processing. IPDPS (2002)
Raymond Hoare, Mary Besterfield-Sacre, Dan Ertman, Jessica Gerchak, Troy A. Johnson, Robert Shields, Larry J. Shuman
Cross-institutional assessment: Development and implementation of the On-line Student Survey System. Comput. Appl. Eng. Educ. 10 (2) (2002)
Raymond Hoare
ClusterNet: An Object-Oriented Cluster Network. IPDPS Workshops (2000)
Raymond Hoare, Henry G. Dietz
A Case for Aggregate Networks. IPPS/SPDP (1998)
Soohong P. Kim, Raymond Hoare, Henry G. Dietz
VLIW Across Multiple Superscalar Processors on a Single Chip. IEEE PACT (1997)
Raymond Hoare, Henry G. Dietz, Timothy Mattox, Soohong P. Kim
Bitwise aggregate networks. SPDP (1996)
Henry G. Dietz, Raymond Hoare, Timothy Mattox
A Fine-Grain Parallel Architecture Based on Barrier Synchronization. ICPP, Vol. 1 (1996)