Combining Mentor Graphics? HDL Designer FPGA Flow with a Reconfigurable System on a Programmable Chip, Educational Opportunity or Insanity?
Raymond HoareShen Chih TungPublished in: MSE (2003)
Keyphrases
- low cost
- field programmable gate array
- single chip
- programmable logic
- digital signal processors
- reconfigurable hardware
- hardware implementation
- hardware design
- high speed
- multimedia
- low power
- low power consumption
- systolic array
- user interface
- embedded systems
- parallel computing
- real time
- power reduction
- power consumption
- computer graphics
- general purpose processors
- image processing algorithms
- educational technology
- reconfigurable architecture
- hardware architecture
- hardware and software
- digital signal
- design methodology
- learning goals
- hardware software
- image processing
- signal processor
- learning analytics
- virtual learning environments