Ranjani Parthasarathi

Publication Activity (10 Years)

Years Active: 1989-2024
Publications (10 Years): 18

Top Topics

Semantic Relations

Document Summarization

Top Venues

J. Intell. Syst.

Concurr. Comput. Pract. Exp.

Publications

J. Dhurga Devi, Bama Srinivasan, Selvi Ravindran, Ranjani Parthasarathi, P. V. Ramakrishna, Lakshmanan Balasubramanian
Machine Learning based Waveform Predictions using Discrete Wavelet Transform for Automated Verification of Analog and Mixed Signal Integrated Circuits. VLSID (2024)
Shashikiran Venkatesha, Ranjani Parthasarathi
Survey on Redundancy Based-Fault tolerance methods for Processors and Hardware accelerators - Trends in Quantum Computing, Heterogeneous Systems and Reliability. ACM Comput. Surv. 56 (11) (2024)
Bama Srinivasan, Mala Nehru, Ranjani Parthasarathi, Saswati Mukherjee, Jeena A Thankachan
Automated Computer Program Evaluation and Projects - Our Experiences. CoRR (2024)
Dhanasekar V, Vinodhini Gunasekaran, Anusha Challa, Bama Srinivasan, J. Dhurga Devi, Selvi Ravindran, Ranjani Parthasarathi, P. V. Ramakrishna, Gopika Geetha Kumar, Venkateswaran Padmanabhan, Guha Lakshmanan, Lakshmanan Balasubramanian
Analysis of Machine Learning Techniques for Time Domain Waveform Prediction in Analog and Mixed Signal Integrated Circuit Verification. ISQED (2023)
Shashikiran Venkatesha, Ranjani Parthasarathi
Enhancement in Reliability for Multi-core system consisting of One Instruction Cores. CoRR (2023)
Shashikiran Venkatesha, Ranjani Parthasarathi
A Survey of fault models and fault tolerance methods for 2D bus-based multi-core systems and TSV based 3D NOC many-core systems. CoRR (2022)
Bama Srinivasan, Ranjani Parthasarathi
A Formalism to Specify Unambiguous Instructions Inspired by Mīmāṁsā in Computational Settings. Logica Universalis 16 (1-2) (2022)
Shashikiran Venkatesha, Ranjani Parthasarathi
A Survey of fault mitigation techniques for multi-core architectures. CoRR (2021)
Padma Jayaraman, Ranjani Parthasarathi
Performance counter based online pipeline bugs detection using machine learning techniques. Microprocess. Microsystems 84 (2021)
Thanasekhar Balaiah, Ranjani Parthasarathi
Autotuning of configuration for program execution in GPUs. Concurr. Comput. Pract. Exp. 32 (9) (2020)
Balaji Jagan, Ranjani Parthasarathi, T. V. Geetha
Bootstrapping of Semantic Relation Extraction for a Morphologically Rich Language: Semi-Supervised Learning of Semantic Relations. Int. J. Semantic Web Inf. Syst. 15 (1) (2019)
K. Kirutika, V. Vetri Selvi, Ranjani Parthasarathi, G. Subrahmanya V. R. K. Rao
Controller Monitoring System In Software Defined Networks Using Random Forest Algorithm. ICCST (2019)
C. N. Subalalitha, Ranjani Parthasarathi
Query Focused Summary Generation System using Unique Discourse Structure. Int. J. Inf. Retr. Res. 7 (1) (2017)
Bama Srinivasan, Ranjani Parthasarathi
A survey of imperatives and action representation formalisms. Artif. Intell. Rev. 48 (2) (2017)
Padma Jayaraman, Ranjani Parthasarathi
A Survey on Post-Silicon Functional Validation for Multicore Architectures. ACM Comput. Surv. 50 (4) (2017)
Thanasekhar Balaiah, Ranjani Parthasarathi
Exploiting GPU memory hierarchy for accelerating a specialized stencil computation. Concurr. Comput. Pract. Exp. 29 (21) (2017)
Balaji Jagan, T. V. Geetha, Ranjani Parthasarathi
Abstractive Summarization: A Hybrid Approach for the Compression of Semantic Graphs. Int. J. Semantic Web Inf. Syst. 12 (2) (2016)
Balaji Jagan, Ranjani Parthasarathi, T. V. Geetha
Unsupervised learning of semantic relations of a morphologically rich language. Int. J. Inf. Commun. Technol. 8 (4) (2016)
Chinnaudayar Navaneethakrishnan Subalalitha, Ranjani Parthasarathi
Building a Language-Independent Discourse Parser using Universal Networking Language. Comput. Intell. 31 (4) (2015)
Ganesh J, Ranjani Parthasarathi, T. V. Geetha
Automatic Construction of Tamil UNL Dictionary. MIKE (2015)
Balaji Jagan, T. V. Geetha, Ranjani Parthasarathi
A Graph Based Query Focused Multi-Document Summarization. Int. J. Intell. Inf. Technol. 10 (1) (2014)
Jayabal Ganesh, Ranjani Parthasarathi, T. V. Geetha, Balaji Jagan
Pattern Based Bootstrapping Technique for Tamil POS Tagging. MIKE (2014)
Balaji Jagan, T. V. Geetha, Ranjani Parthasarathi
Graph-Based Bootstrapping for Coreference Resolution. J. Intell. Syst. 23 (3) (2014)
Chinnaudayar Navaneethakrishnan Subalalitha, Ranjani Parthasarathi
A Unique Indexing Technique for Discourse Structures. J. Intell. Syst. 23 (3) (2014)
Bama Srinivasan, Ranjani Parthasarathi
An intelligent task analysis approach for special education based on MIRA. J. Appl. Log. 11 (1) (2013)
Balaji Jagan, T. V. Geetha, Ranjani Parthasarathi
Two-Stage Bootstrapping for Anaphora Resolution. COLING (Posters) (2012)
Misiriya Shahul Hameed, C. N. Subalalitha, T. V. Geetha, Ranjani Parthasarathi
A deconverter framework for Malayalam. ICACCI (2012)
Bama Srinivasan, Ranjani Parthasarathi
A Formalism for Action Representation Inspired by Mīmāṁsā. J. Intell. Syst. 21 (1) (2012)
E. Umamaheswari, T. V. Geetha, Ranjani Parthasarathi, Madhan Karky
A Multilevel UNL Concept based Searching and Ranking. WEBIST (2011)
Balaji Jagan, T. V. Geetha, Ranjani Parthasarathi, Madhan Karky
Anaphora Resolution in Tamil using Universal Networking Language. IICAI (2011)
D. Judia Salome, Ranjani Parthasarathi
Mining ontological knowledge using Nyaya framework. Int. J. Netw. Virtual Organisations 8 (1/2) (2011)
C. N. Subalalitha, Ranjani Parthasarathi
A Language Independent Rhetorical Structure Framework Using Universal Networking Language. IICAI (2011)
Bama Srinivasan, Ranjani Parthasarathi
Mimamsa Inspired Representation of Actions (MIRA). IICAI (2011)
A. P. Shanthi, Ranjani Parthasarathi
Practical and scalable evolution of digital circuits. Appl. Soft Comput. 9 (2) (2009)
Shri Vidhya Alagesan, Sruthi Kannan, G. Shanthi, A. P. Shanthi, Ranjani Parthasarathi
Intrinsic Evolution of Large Digital Circuits Using a Modular Approach. AHS (2008)
T. K. S. Lakshmi Priya, Ranjani Parthasarathi
An ASM Model for an Autonomous Network-Infrastructure Grid. ICNS (2007)
V. Vetri Selvi, Shakir Sharfraz, Ranjani Parthasarathi
Mobile Ad Hoc Grid Using Trace Based Mobility Model. GPC (2007)
V. Vetri Selvi, Ranjani Parthasarathi
Trace Based Mobility Model for Ad Hoc Networks. WiMob (2007)
T. K. S. Lakshmi Priya, V. Hari Prasad, D. Kannan, L. Karthik Singaram, G. Madhan, R. Meenakshi Sundaram, R. M. Prasad, Ranjani Parthasarathi
Evaluating the Network Processor Architecture for Application-Awareness. COMSWARE (2007)
T. K. S. Lakshmi Priya, Ranjani Parthasarathi
. IWAN (2005)
A. P. Shanthi, L. Karthik Singaram, Ranjani Parthasarathi
Evolution of Asynchronous Sequential Circuits. Evolvable Hardware (2005)
A. P. Shanthi, Ranjani Parthasarathi
Genetic learning based fault tolerant models for digital systems. Appl. Soft Comput. 5 (4) (2005)
R. Sharmila, M. V. Lakshmi Priya, Ranjani Parthasarathi
An Active Framework for a WLAN Access Point Using Intel's IXP1200 Network Processor. HiPC (2004)
A. P. Shanthi, P. Muruganandam, Ranjani Parthasarathi
Enhancing the Development Based Evolution of Digital Circuits. Evolvable Hardware (2004)
A. P. Shanthi, Balaji Vijayan, Manivel Rajendran, Senthilkumar Veluswami, Ranjani Parthasarathi
JBits Based Fault Tolerant Framework for Evolvable Hardware. Engineering of Reconfigurable Systems and Algorithms (2003)
Mohan G. Kabadi, Ranjani Parthasarathi
Live-Cache: Exploiting Data Redundancy to Reduce Leakage Energy in a Cache Subsystem. Asia-Pacific Computer Systems Architecture Conference (2003)
A. P. Shanthi, Ranjani Parthasarathi
Exploring FPGA Structures for Evolving Fault Tolerant Hardware. Evolvable Hardware (2003)
Mohan G. Kabadi, Natarajan Kannan, Palanidaran Chidambaram, Suriya Narayanan, M. Subramanian, Ranjani Parthasarathi
Dead-Block Elimination in Cache: A Mechanism to Reduce I-cache Power Consumption in High Performance Microprocessors. HiPC (2002)
Ranjani Parthasarathi, Easwaran Raman, Karthik Sankaranarayanan, Lakshmi N. Chakrapani
A Reconfigurable Co-Processor for Variable Long Precision Arithmetic Using Indian Algorithms. FCCM (2001)
Ranjani Parthasarathi, Ashok Jhunjhunwala
Multiple precision square root using the Dwandwa square-root algorithm. J. Syst. Archit. 44 (2) (1997)
Ranjani Parthasarathi, Ashok Jhunjhunwala
Modified straight division: A computer implementation of multiple-precision division. Microprocess. Microprogramming 41 (3) (1995)
An-Chi Liu, Ranjani Parthasarathi
Hardware monitoring of a multiprocessor system. IEEE Micro 9 (5) (1989)