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Evolution of Asynchronous Sequential Circuits.

A. P. ShanthiL. Karthik SingaramRanjani Parthasarathi
Published in: Evolvable Hardware (2005)
Keyphrases
  • delay insensitive
  • asynchronous circuits
  • shift register
  • high level synthesis
  • data sets
  • high speed
  • neural network
  • sequential data
  • asynchronous communication
  • logic synthesis
  • analog vlsi
  • vlsi circuits