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Ramen Dutta
Publication Activity (10 Years)
Years Active: 2009-2014
Publications (10 Years): 0
Top Topics
Level Set Method
Low Energy
Multipath
Coarse Grained
Top Venues
IEEE J. Emerg. Sel. Topics Circuits Syst.
IEEE Trans. Circuits Syst. II Express Briefs
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Publications
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Ramen Dutta
,
Ronan A. R. van der Zee
,
André B. J. Kokkeler
,
Mark J. Bentum
,
Eric A. M. Klumperink
,
Bram Nauta
An Ultra Low Energy FSK Receiver With In-Band Interference Robustness Exploiting a Three-Phase Chirped LO.
IEEE J. Emerg. Sel. Topics Circuits Syst.
4 (3) (2014)
Ramen Dutta
,
Eric A. M. Klumperink
,
Xiang Gao
,
Zhiyu Ru
,
Ronan A. R. van der Zee
,
Bram Nauta
Flip-Flops for Accurate Multiphase Clocking: Transmission Gate Versus Current Mode Logic.
IEEE Trans. Circuits Syst. II Express Briefs
(7) (2013)
Eric A. M. Klumperink
,
Ramen Dutta
,
Zhiyu Ru
,
Bram Nauta
,
Xiang Gao
Jitter-Power minimization of digital frequency synthesis architectures.
ISCAS
(2011)
Ramen Dutta
,
Ronan A. R. van der Zee
,
Mark J. Bentum
,
André B. J. Kokkeler
Choosing Optimum Noise Figure and Data Rate in Wireless Sensor Network Radio Transceivers.
ICC
(2011)
Ramen Dutta
,
André B. J. Kokkeler
,
Ronan A. R. van der Zee
,
Mark J. Bentum
Performance of chirped-FSK and chirped-PSK in the presence of partial-band interference.
SCVT
(2011)
Ramen Dutta
,
Tarun Kanti Bhattacharyya
,
Xiang Gao
,
Eric A. M. Klumperink
Optimized Stage Ratio of Tapered CMOS Inverters for Minimum Power and Mismatch Jitter Product.
VLSI Design
(2010)
Ramen Dutta
,
T. K. Bhattacharyya
A Low Power Architecture to Extend the Tuning Range of a Quadrature Clock.
VLSI Design
(2009)