Rajshekar Kalayappan

Publication Activity (10 Years)

Years Active: 2013-2024
Publications (10 Years): 15

Top Topics

Software Implementation

Heterogeneous Systems

Shallow Parsing

Top Venues

ACM Trans. Model. Comput. Simul.

ACM Trans. Embed. Comput. Syst.

Publications

C. Harshitha, Sundarapalli Harikrishna, Peddakotla Rohith, Sandeep Chandran, Rajshekar Kalayappan
On Decomposing Complex Test Cases for Efficient Post-silicon Validation. ASPDAC (2024)
Shruthi Karunakar, Meenakshi Atkade, Akash Poptani, Rajshekar Kalayappan, Sandeep Chandran
CASH: Criticality-Aware Split Hybrid L1 Data Cache. ACM Great Lakes Symposium on VLSI (2024)
Rajshekar Kalayappan, Sandeep Chandran
Dynamic Ineffectuality-based Clustered Architectures. CoRR (2023)
Akash Poptani, Abhishek Mittal, Rishit Saiya, Rajshekar Kalayappan, Sandeep Chandran
SANNA: Secure Acceleration of Neural Network Applications. VLSID (2023)
Rajshekar Kalayappan, Smruti R. Sarangi
A Formal Approach to Accountability in Heterogeneous Systems-on-Chip. IEEE Trans. Dependable Secur. Comput. 18 (6) (2021)
Rajshekar Kalayappan, Avantika Chhabra, Smruti R. Sarangi
ChunkedTejas: A Chunking-based Approach to Parallelizing a Trace-Driven Architectural Simulator. ACM Trans. Model. Comput. Simul. 30 (3) (2020)
Hadi Brais, Rajshekar Kalayappan, Preeti Ranjan Panda
A Survey of Cache Simulators. ACM Comput. Surv. 53 (1) (2020)
Rajshekar Kalayappan, Smruti R. Sarangi
Providing Accountability in Heterogeneous Systems-on-Chip. ACM Trans. Embed. Comput. Syst. 17 (5) (2018)
Geetika Malhotra, Rajshekar Kalayappan, Seep Goel, Pooja Aggarwal, Abhishek Sagar, Smruti R. Sarangi
ParTejas: A Parallel Simulator for Multicore Processors. ACM Trans. Model. Comput. Simul. 27 (3) (2017)
Srishty Patel, Rajshekar Kalayappan, Ishani Mahajan, Smruti R. Sarangi
A hardware implementation of the MCAS synchronization primitive. DATE (2017)
Rajshekar Kalayappan, Smruti R. Sarangi
SecCheck: A Trustworthy System with Untrusted Components. ISVLSI (2016)
Rajshekar Kalayappan, Smruti R. Sarangi
FluidCheck: A Redundant Threading-Based Approach for Reliable Execution in Manycore Processors. ACM Trans. Archit. Code Optim. 12 (4) (2016)
Smruti R. Sarangi, Rajshekar Kalayappan, Prathmesh Kallurkar, Seep Goel
Tejas Simulator : Validation against Hardware. CoRR (2015)
Rajshekar Kalayappan, Smruti R. Sarangi
SecX: A Framework for Collecting Runtime Statistics for SoCs with Multiple Accelerators. ISVLSI (2015)
Smruti R. Sarangi, Rajshekar Kalayappan, Prathmesh Kallurkar, Seep Goel, Eldhose Peter
Tejas: A java based versatile micro-architectural simulator. PATMOS (2015)
Amitabha Bagchi, Rajshekar Kalayappan, Surabhi Sankhla
Surveillance using non-stealthy sensors: A new intruder model. Secur. Commun. Networks 7 (11) (2014)
Rajshekar Kalayappan, Smruti R. Sarangi
A survey of checker architectures. ACM Comput. Surv. 45 (4) (2013)