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Raghava Katreepalli
ORCID
Publication Activity (10 Years)
Years Active: 2016-2019
Publications (10 Years): 3
Top Topics
Peer To Peer Overlay
Computationally Expensive
High Speed
Circuit Design
Top Venues
ISVLSI
Comput. Electr. Eng.
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Publications
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Raghava Katreepalli
,
Themistoklis Haniotakis
Power efficient synchronous counter design.
Comput. Electr. Eng.
75 (2019)
Raghava Katreepalli
,
Themistoklis Haniotakis
High Speed Power Efficient Carry Select Adder Design.
ISVLSI
(2017)
Raghava Katreepalli
,
Hemanth Chemanchula
,
Themistoklis Haniotakis
,
Yiorgos Tsiatouhas
Low-Power and High Performance Sinusoidal Clocked Dynamic Circuit Design.
ISVLSI
(2016)