High Speed Power Efficient Carry Select Adder Design.
Raghava KatreepalliThemistoklis HaniotakisPublished in: ISVLSI (2017)
Keyphrases
- high speed
- information retrieval
- logic circuits
- cost effective
- software architecture
- low power
- chip design
- design space
- power consumption
- peer to peer overlay
- databases
- power dissipation
- design decisions
- engineering design
- selection algorithm
- conceptual framework
- design principles
- user experience
- conceptual model
- computationally expensive
- design process
- building blocks
- evolutionary algorithm
- user interface
- feature selection
- artificial intelligence
- data mining