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R. K. Kavitha
ORCID
Publication Activity (10 Years)
Years Active: 2013-2020
Publications (10 Years): 2
Top Topics
Logic Circuits
Knowledge Sharing
Flip Flops
Low Power
Top Venues
IEEE Trans. Very Large Scale Integr. Syst.
Educ. Inf. Technol.
Microprocess. Microsystems
J. Low Power Electron.
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Publications
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R. K. Kavitha
,
A. Khajamastan
,
Y. Rama Akhilesh
,
B. Venkataramani
High-performance asynchronous pipeline using embedded delay element.
Microprocess. Microsystems
73 (2020)
R. K. Kavitha
,
Vineeth Johns Toms
,
Vipin Vinayakan
,
B. Venkataramani
Low Power Data Driven Conditional Precharge Dynamic Flip Flop.
J. Low Power Electron.
13 (4) (2017)
R. K. Kavitha
,
M. S. Irfan Ahmed
Knowledge sharing through pair programming in learning environments: An empirical study.
Educ. Inf. Technol.
20 (2) (2015)
C. K. Midhun
,
Jephy Joy
,
R. K. Kavitha
High-Speed Dynamic Asynchronous Pipeline: Self-Precharging Style.
IEEE Trans. Very Large Scale Integr. Syst.
22 (10) (2014)
Kalarikkal Absel
,
Lijo Manuel
,
R. K. Kavitha
Low-Power Dual Dynamic Node Pulsed Hybrid Flip-Flop Featuring Efficient Embedded Logic.
IEEE Trans. Very Large Scale Integr. Syst.
21 (9) (2013)