Qiang Yang

Publication Activity (10 Years)

Years Active: 2011-2014
Publications (10 Years): 0

Top Topics

Fault Detection

Programming Environment

Simulation Tools

Top Venues

ACM Trans. Embed. Comput. Syst.

Publications

Qiang Yang, Jian Fu, Raphael Poss, Chris R. Jesshope
On-chip traffic regulation to reduce coherence protocol cost on a microthreaded many-core architecture with distributed caches. ACM Trans. Embed. Comput. Syst. 13 (3s) (2014)
Jian Fu, Qiang Yang, Raphael Poss, Chris R. Jesshope, Chunyuan Zhang
A fault detection mechanism in a Data-flow scheduled Multithreaded processor. DATE (2014)
Jian Fu, Qiang Yang, Raphael Poss, Chris R. Jesshope, Chunyuan Zhang
Rethread: A Low-Cost Transient Fault Recovery Scheme for Multithreaded Processors. ARES (2014)
Raphael Poss, Mike Lankamp, Qiang Yang, Jian Fu, Michiel W. van Tol, Muhammad Irfan Uddin, Chris R. Jesshope
Apple-CORE: Harnessing general-purpose many-cores with hardware concurrency management. Microprocess. Microsystems 37 (8-C) (2013)
Jian Fu, Qiang Yang, Raphael Poss, Chris R. Jesshope, Chunyuan Zhang
On-demand thread-level fault detection in a concurrent programming environment. ICSAMOS (2013)
Raphael Poss, Mike Lankamp, Qiang Yang, Jian Fu, Muhammad Irfan Uddin, Chris R. Jesshope
MGSim - A simulation environment for multi-core research and education. ICSAMOS (2013)
Mike Lankamp, Raphael 'kena' Poss, Qiang Yang, Jian Fu, Muhammad Irfan Uddin, Chris R. Jesshope
MGSim - Simulation tools for multi-core processor architectures CoRR (2013)
Raphael Poss, Mike Lankamp, Qiang Yang, Jian Fu, Michiel W. van Tol, Chris R. Jesshope
Apple-CORE: Microgrids of SVP Cores - Flexible, General-Purpose, Fine-Grained Hardware Concurrency Management. DSD (2012)
Qiang Yang, Chris R. Jesshope, Jian Fu
A Micro Threading Based Concurrency Model for Parallel Computing. IPDPS Workshops (2011)