Mike Lankamp

Publication Activity (10 Years)

Years Active: 2008-2013
Publications (10 Years): 0

Top Topics

Ibm Zenterprise

Heterogeneous Information Systems

High Level Programming Languages

Top Venues

Microprocess. Microsystems

Publications

Raphael Poss, Mike Lankamp, Qiang Yang, Jian Fu, Michiel W. van Tol, Muhammad Irfan Uddin, Chris R. Jesshope
Apple-CORE: Harnessing general-purpose many-cores with hardware concurrency management. Microprocess. Microsystems 37 (8-C) (2013)
Raphael Poss, Mike Lankamp, Qiang Yang, Jian Fu, Muhammad Irfan Uddin, Chris R. Jesshope
MGSim - A simulation environment for multi-core research and education. ICSAMOS (2013)
Mike Lankamp, Raphael 'kena' Poss, Qiang Yang, Jian Fu, Muhammad Irfan Uddin, Chris R. Jesshope
MGSim - Simulation tools for multi-core processor architectures CoRR (2013)
Raphael Poss, Mike Lankamp, Qiang Yang, Jian Fu, Michiel W. van Tol, Chris R. Jesshope
Apple-CORE: Microgrids of SVP Cores - Flexible, General-Purpose, Fine-Grained Hardware Concurrency Management. DSD (2012)
Raphael Poss, Mike Lankamp, Muhammad Irfan Uddin, Jaroslav Sykora, Leos Kafka
Heterogeneous integration to simplify many-core architecture simulations. RAPIDO (2012)
Chris R. Jesshope, Michael A. Hicks, Mike Lankamp, Raphael 'kena' Poss, Li Zhang
Making multi-cores mainstream - from security to scalability. PARCO (2009)
Chris R. Jesshope, Mike Lankamp, Li Zhang
Evaluating CMPs and Their Memory Architecture. ARCS (2009)
Kostas Bousias, Liang Guang, Chris R. Jesshope, Mike Lankamp
Implementation and evaluation of a microthread architecture. J. Syst. Archit. 55 (3) (2009)
Michiel W. van Tol, Chris R. Jesshope, Mike Lankamp, Simon Polstra
An implementation of the SANE Virtual Processor using POSIX threads. J. Syst. Archit. 55 (3) (2009)
Chris R. Jesshope, Mike Lankamp, Li Zhang
The implementation of an SVP many-core processor and the evaluation of its memory architecture. SIGARCH Comput. Archit. News 37 (2) (2009)
Thomas A. M. Bernard, Kostas Bousias, Liang Guang, Chris R. Jesshope, Mike Lankamp, Michiel W. van Tol, Li Zhang
A general model of concurrency and its implementation as many-core dynamic RISC processors. ICSAMOS (2008)