Premkishore Shivakumar

Publication Activity (10 Years)

Years Active: 2002-2012
Publications (10 Years): 0

Top Topics

Defect Detection

Instruction Set

Top Venues

Publications

Premkishore Shivakumar, Stephen W. Keckler, Charles R. Moore, Doug Burger
Exploiting microarchitectural redundancy for defect tolerance. ICCD (2012)
Paul Gratz, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Robert G. McDonald, Stephen W. Keckler, Doug Burger
Implementation and Evaluation of a Dynamically Routed Processor Operand Network. NOCS (2007)
Paul Gratz, Changkyu Kim, Karthikeyan Sankaralingam, Heather Hanson, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger
On-Chip Interconnection Networks of the TRIPS Chip. IEEE Micro 27 (5) (2007)
Karthikeyan Sankaralingam, Ramadass Nagarajan, Robert G. McDonald, Rajagopalan Desikan, Saurabh Drolia, M. S. Govindan, Paul Gratz, Divya Gulati, Heather Hanson, Changkyu Kim, Haiming Liu, Nitya Ranganathan, Simha Sethumadhavan, Sadia Sharif, Premkishore Shivakumar, Stephen W. Keckler, Doug Burger
Distributed Microarchitectural Protocols in the TRIPS Prototype Processor. MICRO (2006)
Premkishore Shivakumar, Stephen W. Keckler, Charles R. Moore, Doug Burger
Exploiting Microarchitectural Redundancy For Defect Tolerance. ICCD (2003)
Premkishore Shivakumar, Michael Kistler, Stephen W. Keckler, Doug Burger, Lorenzo Alvisi
Modeling the Effect of Technology Trends on the Soft Error Rate of Combinational Logic. DSN (2002)
M. S. Hrishikesh, Doug Burger, Stephen W. Keckler, Premkishore Shivakumar, Norman P. Jouppi, Keith I. Farkas
The Optimal Logic Depth Per Pipeline Stage is 6 to 8 FO4 Inverter Delays. ISCA (2002)