Nripendra N. Biswas

Publication Activity (10 Years)

Years Active: 1970-1996
Publications (10 Years): 0

Publications

Nripendra N. Biswas, C. Srikanth, James Jacob
Cubical CAMP for minimization of Boolean functions. VLSI Design (1996)
Sampalli Srinivas, Nripendra N. Biswas
Design and Analysis of a Generalized Architecture for Reconfigurable m-ary Tree Structures. IEEE Trans. Computers 41 (11) (1992)
Nripendra N. Biswas
On covering distant minterms by the camp algorithm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9 (7) (1990)
Nripendra N. Biswas, Sampalli Srinivas
A Reconfigurable Tree Architecture with Multistage Interconnection Network. IEEE Trans. Computers 39 (12) (1990)
James Jacob, Nripendra N. Biswas
Further Comments on "Detection of Faults in Programmable Logic Arrays". IEEE Trans. Computers 39 (1) (1990)
B. Gurunath, Nripendra N. Biswas
An algorithm for multiple output minimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 8 (9) (1989)
K. S. Ramanatha, Nripendra N. Biswas
Design of Crosspoint-Irredundant PLA's Using Minimal Number of Control Inputs. IEEE Trans. Computers 37 (9) (1988)
Nripendra N. Biswas, Sampalli Srinivas, Trishala Dharanendra
A centrally controlled shuffle network for reconfigurable and fault-tolerant architecture. SIGARCH Comput. Archit. News 15 (1) (1987)
Nripendra N. Biswas, S. Srinivas
Simple methods for the calculation of root of a reconfigurable binary tree structure. Proc. IEEE 75 (12) (1987)
Nripendra N. Biswas
Computer-Aided Minimization Procedure for Boolean Functions. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 5 (2) (1986)
Prathima Agrawal, Vishwani D. Agrawal, Nripendra N. Biswas
Multiple output minimization. DAC (1985)
James Jacob, Nripendra N. Biswas
: A Testable PLA Design with Minimal Hardware and Test Set. ITC (1985)
Nripendra N. Biswas
On Bit Steering in the Minimization of the Control Memory of Microprogrammed Processors. IEEE Trans. Computers 34 (11) (1985)
Nripendra N. Biswas
Computer aided minimization procedure for boolean functions. DAC (1984)
K. S. Ramanatha, Nripendra N. Biswas
A Design for Testability of Undetectable Crosspoint Faults in Programmable Logic Arrays. IEEE Trans. Computers 32 (6) (1983)
K. S. Ramanatha, Nripendra N. Biswas
An On-Line Algorithm for the Location of Cross Point Faults in Programmable Logic Arrays. IEEE Trans. Computers 32 (5) (1983)
Chamarty D. V. P. Rao, Nripendra N. Biswas
On the Minimization of Wordwidth in the Control Memory of a Microprogrammed Digital Computer. IEEE Trans. Computers 32 (9) (1983)
K. S. Ramanatha, Nripendra N. Biswas
A Design for Complete Testability of Programmable Logic Arrays. ITC (1982)
Ayakannu Mathialagan, Nripendra N. Biswas
Bit Steering in the Minimization of Control Memory in Microprogrammed Digital Computers. IEEE Trans. Computers 30 (2) (1981)
Ayakannu Mathialagan, Nripendra N. Biswas
Optimal Interconnections in the Design of Microprocessors and Digital Systems. IEEE Trans. Computers 29 (2) (1980)
Anil K. Sarje, Nripendra N. Biswas
A New Approach to 2-Asummability Testing. IEEE Trans. Computers 28 (10) (1979)
Anil K. Sarje, Nripendra N. Biswas
An Algorithm for Testing 2-Asummability of Boolean Functions. IEEE Trans. Computers 26 (10) (1977)
C. V. S. Rao, Nripendra N. Biswas
Further Comments on "Closure Partition Method for Minimizing Incomplete Sequential Machines". IEEE Trans. Computers 25 (7) (1976)
C. V. S. Rao, Nripendra N. Biswas
Minimization of Incompletely Specified Sequential Machines. IEEE Trans. Computers 24 (11) (1975)
Nripendra N. Biswas
State Minimization of Incompletely Specified Sequential Machines. IEEE Trans. Computers 23 (1) (1974)
Nripendra N. Biswas
Comments on "Identification of Totally Symmetric Boolean Functions". IEEE Trans. Computers 22 (9) (1973)
Nripendra N. Biswas
Minimization of Boolean Functions. IEEE Trans. Computers 20 (8) (1971)
Nripendra N. Biswas
On Identification of Totally Symmetric Boolean Functions. IEEE Trans. Computers 19 (7) (1970)