Nils Hedenstierna

Publication Activity (10 Years)

Years Active: 1987-1993
Publications (10 Years): 0

Publications

Nils Hedenstierna, Kjell O. Jeppson
The halo algorithm-an algorithm for hierarchical design of rule checking of VLSI circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12 (2) (1993)
Nils Hedenstierna, Kjell O. Jeppson
Comments on 'A module generator for optimized CMOS buffers'. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12 (1) (1993)
Kjell O. Jeppson, Sven Christensson, Nils Hedenstierna
Formal definitions of edge-based geometric design rules. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12 (1) (1993)
Nils Hedenstierna, Kjell O. Jeppson
The Use of Inverse Layout Trees for Hierarchical Design Rule Checking. DAC (1989)
Nils Hedenstierna, Kjell O. Jeppson
The use of inverse layout trees for hierarchical design verification. ICCAD (1988)
Nils Hedenstierna, Kjell O. Jeppson
A corner-based hierarchical circuit extractor. Integr. 6 (3) (1988)
Nils Hedenstierna, Kjell O. Jeppson
New algorithms for increased efficiency in hierarchical design rule checking. Integr. 5 (3-4) (1987)
Nils Hedenstierna, Kjell O. Jeppson
CMOS Circuit Speed and Buffer Optimization. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6 (2) (1987)