CMOS Circuit Speed and Buffer Optimization.

Nils Hedenstierna Kjell O. Jeppson

Published in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1987)

Keyphrases

high speed
analog vlsi
circuit design
low power
delay insensitive
real time
global optimization
cmos technology
power dissipation
power consumption
low voltage
optimal solution
optimization algorithm
optimization process
combinatorial optimization
vlsi circuits
low cost