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Neethu Bal Mallya
Publication Activity (10 Years)
Years Active: 2015-2019
Publications (10 Years): 1
Top Topics
Multithreading
Transport Protocol
Energy Efficient
Prefetching
Top Venues
iNIS
Int. J. Embed. Syst.
VLSI Design
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Publications
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Geeta Patil
,
Neethu Bal Mallya
,
Biju K. Raveendran
MOESIF: a MC/MP cache coherence protocol with improved bandwidth utilisation.
Int. J. Embed. Syst.
11 (4) (2019)
Neethu Bal Mallya
,
Geeta Patil
,
Biju K. Raveendran
Way Halted Prediction Cache: An Energy Efficient Cache Architecture for Embedded Processors.
VLSI Design
(2015)
Neethu Bal Mallya
,
Geeta Patil
,
Biju K. Raveendran
Simulation based Performance Study of Cache Coherence Protocols.
iNIS
(2015)