Narayanan Krishnamurthy

Publication Activity (10 Years)

Years Active: 1999-2019
Publications (10 Years): 1

Top Topics

Commodity Hardware

Internet Search

Top Venues

Stat. Anal. Data Min.

Publications

Vyacheslav N. Romanov, Narayanan Krishnamurthy, Amit K. Verma, Laura S. Bruckman, Roger H. French, Jennifer L. W. Carter, Jeffrey A. Hawk
Materials data analytics for 9% Cr family steel. Stat. Anal. Data Min. 12 (4) (2019)
Prabhat Mishra, Nikil D. Dutt, Narayanan Krishnamurthy, Magdy S. Abadir
A methodology for validation of microprocessors using symbolic simulation. Int. J. Embed. Syst. 1 (1/2) (2005)
Narayanan Krishnamurthy, Jayanta Bhadra, Magdy S. Abadir, Jacob A. Abraham
Towards The Complete Elimination of Gate/Switch Level Simulations. VLSI Design (2004)
Prabhat Mishra, Nikil D. Dutt, Narayanan Krishnamurthy, Magdy S. Abadir
A Top-Down Methodology for Microprocessor Validation. IEEE Des. Test Comput. 21 (2) (2004)
Jayanta Bhadra, Narayanan Krishnamurthy, Magdy S. Abadir
Enhanced Equivalence Checking: Toward a Solidarity of Functional Verification and Manufacturing Test Generation. IEEE Des. Test Comput. 21 (6) (2004)
Magdy S. Abadir, Ken Albin, John Havlicek, Narayanan Krishnamurthy, Andrew K. Martin
Formal Verification Successes at Motorola. Formal Methods Syst. Des. 22 (2) (2003)
Jayanta Bhadra, Narayanan Krishnamurthy, Magdy S. Abadir
A Methodology for Validating Manufacturing Test Vector Suites for Custom Designed Scan-Based Circuits. MTV (2003)
Jayanta Bhadra, Narayanan Krishnamurthy
Automatic Generation of Design Constraints in Verifying High Performance Embedded Dynamic Circuits. ITC (2002)
Narayanan Krishnamurthy, Jayanta Bhadra, Magdy S. Abadir, Jacob A. Abraham
Is State Mapping Essential for Equivalence Checking Custom Memories in Scan-Based Designs? VTS (2002)
Narayanan Krishnamurthy, Magdy S. Abadir, Andrew K. Martin, Jacob A. Abraham
Design and Development Paradigm for Industrial Formal Verification CAD Tools. IEEE Des. Test Comput. 18 (4) (2001)
Narayanan Krishnamurthy, Andrew K. Martin, Magdy S. Abadir, Jacob A. Abraham
Validation of PowerPC(tm) Custom Memories using Symbolic Simulation. VTS (2000)
Narayanan Krishnamurthy, Andrew K. Martin, Magdy S. Abadir, Jacob A. Abraham
Validating PowerPC Microprocessor Custom Memories. IEEE Des. Test Comput. 17 (4) (2000)
Zeyad Alkhalifa, V. S. S. Nair, Narayanan Krishnamurthy, Jacob A. Abraham
Design and Evaluation of System-Level Checks for On-Line Control Flow Error Detection. IEEE Trans. Parallel Distributed Syst. 10 (6) (1999)